參數(shù)資料
型號： TLC320AD50IPT
廠商： Texas Instruments, Inc.
英文描述： SIGMA-DELTA ANALOG INTERFACE CIRCUITS WITH MASTER-SLAVE FUNCTION
中文描述： sigma - delta模擬接口，具有大師電路，從功能
文件頁數(shù)： 34/84頁
文件大?。?/td> 447K
代理商： TLC320AD50IPT
2–19
2.18.1
Primary Serial Communications Data Format
D15
D14
D13
D12
D11
D10
D09
D08
D07
D06
D05
D04
D03
D02
D01
D00
14-bit DAC Conversion Result
2s-Complement Format
Control Bits
Since the supply voltage is single ended, the reference for 2s-complement format is ADC VMID. Voltages above
this reference have a 0 as the MSB, and voltages below this reference have a 1 as the MSB.
During primary serial communications, when D01 and D00 are both high in the DAC data word to DIN, a
subsequent 16 bits of control information is received by the device at DIN during a secondary
serial-communication interval. This secondary serial-communication interval begins at 1/2 the programmed
conversion time when the B register data value is even or 1/2 the programmed value minus one FCLK when
the B register data value is odd. The time between primary and secondary serial communication is
measured from the falling edge of the primary frame sync to the falling edge of the secondary frame sync
(see Section 2.19 for function and format of control words).
2.18.2
Data Format From DOUT During Primary Serial Communications
14-Bit ADC Conversion Result
2s-Complement Format
D15 is the Sign Bit
D15
D14
D13
D12
D11
D10
D09
D08
D07
D06
D05
D04
D03
D02
D01
D00
D01
D00
0
0
D01
D00
0
1
Master Mode
Slave Mode
2.19 Secondary Serial Communications
2.19.1
Data Format to DIN During Secondary Serial Communications
There are nine 16-bit configuration and control registers numbered from zero to eight. All register data
contents are represented in 2s-complement format. The general format of the commands during secondary
serial communications is as follows.
DS15 DS14 DS13 DS12 DS11 DS10 DS09 DS08 DS07 DS06 DS05 DS04 DS03 DS02 DS01 DS00
Control Bits
(2 bits)
R/W
Bit
Register Address
(5 bits)
Register Data Value
(8 bits)
All control register words are latched in the register and valid on the sixteenth falling edge of SCLK.
2.19.2
2.19.2.1 DS15 and DS14
In the secondary data word, bits DS15 and DS14 perform the same control function as the primary control
bits D01 and D00 do in the primary data word.
Control Data-Bit Function in Secondary Serial Communication
DS15 DS14 DS13 DS12
DS11 DS10 DS09 DS08 DS07 DS06 DS05 DS04 DS03 DS02 DS01 DS00
R/W
Register Address
Register Data
Control Bits
Hardware terminals FC1 and FC0 are valid inputs when DS15 and DS14 are both high, and they are ignored
for all other conditions.
相關(guān)PDF資料
PDF描述
TLC320AD50(中文) Sigma-Delta Analog Interface Circuit With Master-Slave Function(Sigma-Delta 模擬接口具主從功能)
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