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| 型號： | THS8210PFP |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP80 |
| 封裝： | POWER, PLASTIC, TQFP-80 |
| 文件頁數(shù)： | 4/73頁 |
| 文件大?。?/td> | 2053K |
| 代理商： | THS8210PFP |
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THS8200/8210
‘ALL-FORMAT’ OVERSAMPLED COMPONENT VIDEO/PC GRAPHICS D/A SYSTEM WITH
THREE 11 BIT DAC’S, CGMS DATA INSERTION AND 525P MACROVISION
TM COPY
PROTECTION
SLES032—6/18/02 3:33 PM
POST OFFICE BOX 655303 DALLAS TEXAS 77265
12
Copyright 2001 Texas Instruments Incorporated
PRODUCT PREVIEW information concerns products in the
formative or design phase of development. Characteristic data
and other specifications are design goals. Texas Instruments
reserves the right to change or discontinue these products
without notice.
C
OUT
DAC Output
Capacitance (pin
capacitance)
5
pF
t
RDAC
DAC Output
Current Risetime
10 to 90% of full-
scale
2
ns
t
FDAC
DAC Output
Current Falltime
10 to 90% of full-
scale
2
ns
t
D(A)
Analog Output
Delay
Note 5.
Measured from
CLK=V
IH(min) to 50% of
full-scale transition
TBD
ns
t
S
Analog Output
Settling Time
Note 6.
measured from 50%
of full scale transition
on output to output
settling, within 2%
TBD
ns
SNR
Signal to Noise
Ratio
1MHz, -1dBFS digital
sine input
57.5
dB
SFDR
Spurious-free
Dynamic Range
1MHz, -1dBFS digital
sine input
64
dB
BW(1dB)
Bandwidth
120
MHz
E
glitch
Glitch energy
full-scale code
transition @ 205
MSPS
25
pVs
Notes:
1.
PSRR is measured with a 0.1uF capacitor between the COMP and AVDD pin; with a 0.1uF capacitor
connected between the VREF pin and AVSS. The ripple amplitude is within the range 100mVp-p to 500mVp-p
with the DAC output set to full scale and a double-terminated 75
(=37.5) load. PSRR is defined as
20*log(ripple voltage at DAC output / ripple voltage at AVDD input). Limits from characterization only.
2.
Crosstalk spec applies to each possible pair of the 3 DAC outputs. Limit from characterization only.
3.
The imbalance between DACs applies to all possible pairs of the three DACs.
4.
Nominal values at RFS=RFS(nom) ; Maximum values at RFS=TBD RFS(nom). Maximum limits from characterization
only.
5.
This value excludes the digital process delay, tD(D). Limit from characterization only.
6.
Maximum limit from characterization only.
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