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參數(shù)資料
| 型號： | THS12082DA |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 12-BIT, 8 MSPS, SIMULTANEOUS SAMPLING ANALOG-TO-DIGITAL CONVERTERS |
| 中文描述： | 12位，8 MSPS的同步采樣模擬數(shù)字轉換器 |
| 文件頁數(shù)： | 3/38頁 |
| 文件大小： | 517K |
| 代理商： | THS12082DA |
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THS12082
12-BIT, 8 MSPS, SIMULTANEOUS SAMPLING ANALOG-TO-DIGITAL CONVERTERS
SLAS271 – MAY 2000
3
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Terminal Functions
TERMINAL
NAME
AINP
AINM
AVDD
AGND
BVDD
BGND
CONV_CLK
(CONVST)
I/O
DESCRIPTION
NO.
30
29
23
24
7
8
15
I
I
I
I
I
I
I
Analog input, single-ended or positive input of differential channel A
Analog input, single-ended or negative input of differential channel A
Analog supply voltage
Analog ground
Digital supply voltage for buffer
Digital ground for buffer
Digital input. This input is used to apply an external conversion clock in the continuous conversion mode.
In the single conversion mode, this input functions as the conversion start (CONVST) input. A high to low
transition on this input holds simultaneously the selected analog input channels and initiates a single
conversion of all selected analog inputs.
Chip select input (active low)
Chip select input (active high)
Data available signal, which can be used to generate an interrupt for processors and as a level
information of the internal FIFO. This signal can be configured to be active low or high and can be
configured as a static level or pulse output. See Table 7.
Digital ground. Ground reference for digital circuitry.
Digital supply voltage
Digital input, output; D0 = LSB
Digital input, output. The data line D10 is also used as an address line (RA0) for the control register. This
is required for writing to control register 0 and control register 1. See Table 8.
CS0
CS1
DATA_AV
22
21
16
I
I
O
DGND
DVDD
D0 – D9
RA0/D10
17
18
I
I
1–6, 9–12
13
I/O/Z
I/O/Z
RA1/D11
14
I/O/Z
Digital input, output (D11 = MSB). The data line D11 is also used as an address line (RA1) for the control
register. This is required for writing to control register 0 and control register 1. See Table 8.
OV_FL
32
O
Overflow output. Indicates whether an overflow in the FIFO occurred. OV_FL is set to active high level if
an overflow occurs. It is set back to low level with a reset of the THS12082 or a reset of the FIFO.
REFIN
28
I
Common-mode reference input for the analog input channels. It is recommended that this pin be
connected to the reference output REFOUT.
Reference input, requires a bypass capacitor of 10
μ
F to AGND in order to bypass the internal reference
voltage. An external reference voltage at this input can be applied. This option can be programmed
through control register 0. See Table 6.
Reference input, requires a bypass capacitor of 10
μ
F to AGND in order to bypass the internal reference
voltage. An external reference voltage at this input can be applied. This option can be programmed
through control register 0. See Table 6.
Hardware reset of the THS12082. Sets the control register to default values.
Analog fixed reference output voltage of 2.5 V. Sink and source capability of 250
μ
A. The reference
output requires a capacitor of 10
μ
F to AGND for filtering and stability.
The RD input is used only if the WR input is configured as a write only input. In this case, it is a digital input,
active low as a data read select from the processor. See timing section.
REFP
26
I
REFM
25
I
RESET
REFOUT
31
27
I
O
RD
19
I
WR (R/W)
20
I
This input is programmable. It functions as a read-write input (R/W) and can also be configured as a
write-only input (WR), which is active low and used as data write select from the processor. In this case,
the RD input is used as a read input from the processor. See timing section.
The start-conditions of RD and WR (R/W) are unknown. The first access to the ADC has to be a write access to initialize the ADC.
P
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| THS12082EVM | 功能描述:EVALUATION MODULE FOR THS12082 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估板 - 模數(shù)轉換器 (ADC) 系列:- 產(chǎn)品培訓模塊:Obsolescence Mitigation Program 標準包裝:1 系列:- ADC 的數(shù)量:1 位數(shù):12 采樣率（每秒）:94.4k 數(shù)據(jù)接口:USB 輸入范圍:±VREF/2 在以下條件下的電源（標準）:- 工作溫度:-40°C ~ 85°C 已用 IC / 零件:MAX11645 已供物品:板，軟件 |
| THS12082IDA | 功能描述:模數(shù)轉換器 - ADC 12 Bit 8 MSPS Dual Ch RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| THS12082IDAG4 | 功能描述:模數(shù)轉換器 - ADC 12 Bit 8 MSPS Dual Ch RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| THS12082IDAR | 功能描述:模數(shù)轉換器 - ADC 12 Bit 8 MSPS Dual Ch RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| THS12082IDARG4 | 功能描述:模數(shù)轉換器 - ADC 12 Bit 8 MSPS Dual Ch RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
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