參數(shù)資料
型號(hào): THS12082DA
廠商: Texas Instruments, Inc.
英文描述: 12-BIT, 8 MSPS, SIMULTANEOUS SAMPLING ANALOG-TO-DIGITAL CONVERTERS
中文描述: 12位,8 MSPS的同步采樣模擬數(shù)字轉(zhuǎn)換器
文件頁(yè)數(shù): 21/38頁(yè)
文件大小: 517K
代理商: THS12082DA
THS12082
12-BIT, 8 MSPS, SIMULTANEOUS SAMPLING ANALOG-TO-DIGITAL CONVERTERS
SLAS271 – MAY 2000
21
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
DATA_AV type
Bit 4 and bit 5 (DATA_T, DATA_P) of control register 1 are used to program the signal DATA_AV. Bit 4 of
control register 1 determines whether the DATA_AV signal is static or a pulse. Bit 5 of the control register
determines the polarity of DATA_AV. This is shown in Table 14.
Table 14. DATA_AV Type
BIT 5
DATA_P
BIT 4
DATA_T
DATA_AV TYPE
0
0
Active low level
0
1
Active low pulse
1
0
Active high level
1
1
Active high pulse
The signal DATA_AV is set to active when the trigger condition is satisfied. It is set back inactive independent
of the DATA_T selection (pulse or level).
If level mode is chosen, DATA_AV is set inactive after the first of the TL (TL = trigger level) reads (with the falling
edge of READ). The trigger condition is checked again after TL reads.
If pulse mode is chosen, the signal DATA_AV is a pulse with a width of one half of a CONV_CLK cycle in
continuous conversion mode and one half of a clock cycle of the internal oscillator in single conversion mode.
When the TL values previously written into the FIFO were read out by the processor, the next DATA_AV pulse
(when the trigger condition is satisfied) is sent out first.
P
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