參數資料
型號: THS1031TSSOP
廠商: Texas Instruments, Inc.
英文描述: 2.7 V . 5.5 V, 10-BIT, 30 MSPS CMOS ANALOG-TO-DIGITAL CONVERTER
中文描述: 2.7伏。 5.5五,10位,30 MSPS的CMOS模擬數字轉換器
文件頁數: 22/26頁
文件大?。?/td> 358K
代理商: THS1031TSSOP
THS1031
2.7 V – 5.5 V, 10-BIT, 30 MSPS
CMOS ANALOG-TO-DIGITAL CONVERTER
SLAS242A – NOVEMBER 1999 – REVISED JANUARY 2000
22
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PRINCIPLES OF OPERATION
clamp operation (continued)
Clamp and Droop Analysis
16–Bit DAC
SW2
SW1
AIN
CLAMP
CLAMPIN
+
C1
R1
S/H
Control
Register
Figure 22. Clamp Operation
Clamp Acquisition Time:
Figure 22 shows the basic operation of the clamp circuit in which the ac input
signal is passed through an RC coupler.
The acquisition time when the switch is closed will equal a: T(acq) = C
i
.R
i
ln(Vc/Ve)(Eq.1)
In case of composite video, typical input Ri = 20
. In a video clamping application, the droop is a critical
parameter and thus the input capacitor should be sized to allow sufficient acquisition time of clamp voltage at
AIN within the CLAMP interval, but also to minimize droop between clamping intervals. Typically, C
i
= 1
μ
F
By applying equation 1 above, the following examples apply to an NTSC composite video signal:
The acquisition time needed to clamp 1-V input level to black level (0.340 Vdc ) is about 130
μ
s.
The acquisition time needed to clamp 2-V input level to the white level (1 Vdc) is about 140
μ
s.
The acquisition time needed to clamp 3-V input level to the sync level (0.288 Vdc) is about 160
μ
s.
droop
The voltage droop is the voltage change across the input capacitor C
i
by the bias current as follows:
dV
I
bias
Ci (t)
where t = elapsed time between clamping intervals
The bias current depends on the sampling rate. For a sampling rate of 30 MSPS and a typical input capacitance
of 1 pF, the input resistance is
Rs = 1/(Cs.Fs) = 1/(1 pFx30 MHz) = 33 k
For 1-V input range and clamping period = 64
μ
s, the max bias current will equal I
bias
= 0.5 V/33 k
= 15
μ
A:
dV = (15
μ
A/1
μ
F)(64
μ
s) = 0.96 mV
For 1-V input range and clamping period = 64
μ
s, the max bias current will equal I
bias
= 0.5 V/33 k
= 15
μ
A:
dV = (15
μ
A/1
μ
F)(64
μ
s) = 0.96 mV
For 2-V input range and clamping period = 64
μ
s, the max bias current will equal I
bias
= 1.0 V/33 k
= 30
μ
A
dV = (30
μ
A/1
μ
F)(64
μ
s) = 1.9 mV
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