參數(shù)資料
型號(hào): THS1031IPWR
廠商: TEXAS INSTRUMENTS INC
元件分類(lèi): ADC
英文描述: 1-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28
封裝: GREEN, PLASTIC, TSSOP-28
文件頁(yè)數(shù): 17/41頁(yè)
文件大?。?/td> 728K
代理商: THS1031IPWR
THS1031
3-V TO 5.5-V, 10-BIT, 30 MSPS
CMOS ANALOG-TO-DIGITAL CONVERTER
SLAS242E – NOVEMBER 1999 – REVISED MARCH 2002
24
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PRINCIPLES OF OPERATION
operating configuration examples (continued)
Figure 27 shows an example of top/bottom mode operation on an input span of 800 mV with mid-scale value
1.5 V. Pin REFTS is set to 2.5 V and pin REFBS to 0.5 V, making their average value equal to the mid-scale
value of AIN and giving the maximum specified difference of 2 V between REFTS and REFBS to maximize the
full-scale range of the ADC core for best resolution. The PGA gain then has to be set to 2.5, to amplify the
800 mVPP input signal to 2 VPP at the ADC core input.
AIN
REFTS
REFBS
REFTF
REFBF
MODE
AVDD
1.9 V
1.1 V
0.1
F
10
F
0.1
F
0.1
F
1.5 V
DC SOURCE = 2.5 V
DC SOURCE = 0.5 V
REFSENSE
Figure 27. Top/Bottom Mode, PGA Gain 2.5
clamp operation
10-Bit
DAC
_
+
CLAMPIN
CLAMP
AIN
RIN
CIN
V(Clamp)
Control Register (Bit CLINT)
S/H
VIN
SW1
Figure 28. Schematic of Clamp Circuitry
The THS1031 provides a clamp function for restoring a dc reference level to the signal at AIN which has been
lost through ac-coupling from the signal source to this pin.
Figure 29 shows an example of using the clamp to restore the black level of a composite video input ac coupled
to AIN. While the clamp pin is held high, the clamp amplifier forces the voltage at AIN to equal the clamp
reference voltage, setting the dc voltage at AIN for the video black level.
After power up, the clamp reference voltage is the voltage on the CLAMPIN pin. This reference can instead be
taken from the internal CLAMP DAC by suitably programming the THS1031 clamp and control registers.
Clamp acquisition and clamp droop design calculations are discussed later.
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