參數(shù)資料
型號(hào)： THS1031IPWR
廠商： TEXAS INSTRUMENTS INC
元件分類： ADC
英文描述： 1-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28
封裝： GREEN, PLASTIC, TSSOP-28
文件頁(yè)數(shù)： 15/41頁(yè)
文件大?。?/td> 728K
代理商： THS1031IPWR
THS1031
3-V TO 5.5-V, 10-BIT, 30 MSPS
CMOS ANALOG-TO-DIGITAL CONVERTER
SLAS242E – NOVEMBER 1999 – REVISED MARCH 2002
22
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PRINCIPLES OF OPERATION
onboard reference generator configuration (continued)
_
+
VBG
Internal
Reference
Buffer
Mode =
REFSENSE
AGND
VREF = External
AVDD
_
+
AVDD
2
Figure 23. Drive VREF Mode
operating configuration examples
This section provides examples of operating configurations.
Figure 24 shows the operating configuration in top/bottom mode for a 2-V span single-ended input, using VREF
to drive REFTS and with PGA gain = 1. Connecting the MODE pin to AVDD puts the THS1031 in top/bottom
mode. Connecting pin REFSENSE to AGND sets the output of the ORG to 2 V. REFTS and REFBS are
user-connected to VREF and AGND respectively to match the AIN pin input range to the voltage range of the
input signal.
AIN
REFTF
REFBF
REFSENSE
MODE
AVDD
2 V
0 V
0.1
F
10
F
0.1
F
0.1
F
1 V
VREF = 2 V
REFTS
REFBS
Figure 24. Operation Configuration in Top/Bottom Mode
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