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| 型號： | TEA5766UK |
| 廠商： | ST-ERICSSON |
| 元件分類： | 接收器 |
| 英文描述： | FM, AUDIO SINGLE CHIP RECEIVER, PBGA25 |
| 封裝： | 3.30 X 3.25 MM, 0.60 MM HEIGHT, WLCSP-25 |
| 文件頁數(shù)： | 8/60頁 |
| 文件大?。?/td> | 298K |
| 代理商： | TEA5766UK |
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TEA5766UK_1
NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 — 22 March 2007
15 of 59
NXP Semiconductors
TEA5766UK
Stereo FM radio + RDS
The interrupt ag register contains the ags set according to the behavior outlined in
Section 8.2. When these ags are set they can also cause the INTX to go active
(hardware interrupt line) depending on the status of the corresponding mask bit in Table 8.
A logic 1 in the mask register enables the hardware interrupt for that ag.
Hence it is conceivable that, with all the mask bits cleared, the software could operate in a
polling mode by a continuous read operation of the interrupt ag register to look for bits
being set.
Interrupt mask bits are always cleared after reading the rst two bytes of the interrupt
register. This is to control multiple hardware interrupts (see Figure 6). Bit LSYNCMSK has
a different function and is not cleared after reading the interrupt register bytes (see
8.1.1 Interrupt clearing
The interrupt ag and mask bits are always cleared after:
They have been read via the control interface
A power-on reset
8.1.2 Timing
The timing sequence for the general operation interrupts is shown in Figure 6 and shows
a read access of the interrupt bytes INTFLAG and INTMSK and a subsequent (though not
necessarily immediate) write to the mask register. It also indicates two key timing points A
and B.
If an interrupt event occurs while the register is being accessed (after point A) it must be
held until after the mask register is cleared at the end of the read operation (point B).
Point A is situated after the R/W bit has been decoded and point B is where the
acknowledge has been received from the master (host processor, etc.) after the rst two
bytes have been sent.
However it can be shorter if the read of the INTREG registers occurs within the tp.
8.1.3 Reset
A reset can be performed (at any time) by a simple read of the interrupt bytes (byte 0R
and byte 1R), which automatically clears the interrupt ags and masks.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TEA5766UK/N1,023 | 功能描述:調(diào)節(jié)器/解調(diào)器 FM RADIO + RDS RoHS:否 制造商:Texas Instruments 封裝 / 箱體:PVQFN-N24 封裝:Reel |
| TEA5766UK/N1,118 | 功能描述:調(diào)節(jié)器/解調(diào)器 FM RADIO + RDS RoHS:否 制造商:Texas Instruments 封裝 / 箱體:PVQFN-N24 封裝:Reel |
| TEA5766UK/N1/S21,0 | 功能描述:調(diào)諧器 FM RADIO + RDS RoHS:否 制造商:NXP Semiconductors 功能: 噪聲系數(shù): 工作電源電壓: 最小工作溫度: 最大工作溫度: |
| TEA5766UK/N1/S21,1 | 功能描述:調(diào)諧器 FM RADIO + RDS RoHS:否 制造商:NXP Semiconductors 功能: 噪聲系數(shù): 工作電源電壓: 最小工作溫度: 最大工作溫度: |
| TEA5766UK/N1-G | 功能描述:調(diào)諧器 FM RADIO + RDS RoHS:否 制造商:NXP Semiconductors 功能: 噪聲系數(shù): 工作電源電壓: 最小工作溫度: 最大工作溫度: |
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