參數(shù)資料
型號(hào): TEA5766UK
廠(chǎng)商: ST-ERICSSON
元件分類(lèi): 接收器
英文描述: FM, AUDIO SINGLE CHIP RECEIVER, PBGA25
封裝: 3.30 X 3.25 MM, 0.60 MM HEIGHT, WLCSP-25
文件頁(yè)數(shù): 16/60頁(yè)
文件大小: 298K
代理商: TEA5766UK
TEA5766UK_1
NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 — 22 March 2007
22 of 59
NXP Semiconductors
TEA5766UK
Stereo FM radio + RDS
If a data block is decoded and a new data block arrives, INTX will go LOW again, the
DAVFLG will be set, the last block will be shifted to the previous block and the last
decoded block will be put in the last block. This means that all RDS data is still available in
the BL and BP registers.
When the bus registers are not read the DAVFLG will not be reset. If a data block is
decoded and a new data block arrives, INTX will go LOW and the last block will be shifted
to the previous block and the last decoded block will be put in the last block. This means
that all RDS data is still available in the BL and BP registers, but must be read. This is
indicated by the DOVF bit which is set.
If again the bus registers are not read, data will be lost except when this read is done
within 20 ms after the INTX line has gone LOW, so 2 ms before the arrival of a new block.
If this read is done at least 2 ms before the arrival of a new block, then BL and BP are read
and the data in the decoder buffer is then instantaneously shifted to the BL register. All
data is now read and the DOVF bit will be reset.
The diagram assumes that block synchronization has been achieved and that no other
interrupt ags are being set.
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