參數(shù)資料
型號： TE28F640C3
廠商： Intel Corp.
英文描述： 3 Volt Intel Advanced+ Boot Block Flash Memory
中文描述： 3伏英特爾高級啟動塊閃存
文件頁數(shù)： 7/58頁
文件大小： 920K
代理商： TE28F640C3
28F004/400B3, 28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3
3UHOLPLQDU\
1
1.0
Introduction
This datasheet contains the specifications for the 3 Volt Advanced Boot Block flash memory
family, which is optimized for low power, portable systems. This family of products features
1.65 V–2.5 V or 2.7 V–3.6 V I/Os and a low V
CC
/V
PP
operating range of 2.7 V–3.6 V for read,
program, and erase operations. In addition this family is capable of fast programming at 12 V.
Throughout this document, the term “2.7 V” refers to the full voltage range 2.7 V–3.6 V (except
where noted otherwise) and “V
PP
= 12 V” refers to 12 V ±5%. Section 1.0 and 2.0 provide an
overview of the flash memory family including applications, pinouts and pin descriptions. Section
3.0 describes the memory organization and operation for these products. Sections 4.0 and 5.0
contain the operating specifications. Finally, Sections 6.0 and 7.0 provide ordering and other
reference information.
The 3 Volt Advanced Boot Block flash memory features:
Enhanced blocking for easy segmentation of code and data or additional design flexibility
Program Suspend to Read command
V
CCQ
input of 1.65 V–2.5 V on all I/Os. See Figures 1 through 4 for pinout diagrams and
V
CCQ
location
Maximum program and erase time specification for improved data storage.
NOTES:
1. 32-Mbit and 64-Mbit densities not available in 40-lead TSOP.
2. 4-Mbit density not available in
μ
BGA* CSP.
3. V
CC
Max is 3.3 V on 0.25
μ
m 32-Mbit devices.
4. 4- and 64-Mbit densities not available on 48-Ball VF BGA.
Table 1. 3 Volt Advanced Boot Block Feature Summary
Feature
28F004B3
(2)
, 28F008B3,
28F016B3
28F400B3
(2)
,
28F800B3,
28F160B3, 28F320B3
,
28F640B3
Reference
V
CC
Read Voltage
2.7 V– 3.6 V
Section 4.2
,
Section 4.4
Section 4.2, 4.4
Section 4.2, 4.4
Table 3
Section 4.5
V
CCQ
I/O Voltage
V
PP
Program/Erase Voltage
Bus Width
Speed
1.65 V–2.5 V or 2.7 V– 3.6 V
2.7 V– 3.6 V or 11.4 V– 12.6 V
8 bit
16 bit
70 ns, 80 ns, 90 ns, 100 ns, 110 ns
Memory Arrangement
512 Kbit x 8 (4 Mbit)
1024 Kbit x 8 (8 Mbit),
2048 Kbit x 8 (16 Mbit)
256 Kbit x 16 (4 Mbit),
512 Kbit x 16 (8 Mbit),
1024 Kbit x 16 (16 Mbit),
2048 Kbit x 16 (32 Mbit),
4096 Kbit x 16 (64 Mbit)
Section 2.2
Blocking (top or bottom)
Eight 8-Kbyte parameter blocks
and
Seven 64-Kbyte blocks (4 Mbit) or
Fifteen 64-Kbyte blocks (8 Mbit) or
Thirty-one 64-Kbyte main blocks (16 Mbit)
Sixty-three 64-Kbyte main blocks (32 Mbit)
One hundred twenty-seven 64-Kbyte main blocks (64 Mbit)
WP# locks/unlocks parameter blocks
All other blocks protected using V
PP
Extended: –40
°
C to +85
°
C
100,000 cycles
Section 2.2
Appendix C
Locking
Section 3.3
Table 8
Section 4.2, 4.4
Section 4.2, 4.4
Operating Temperature
Program/Erase Cycling
Packages
40-lead TSOP
(1)
,
48-Ball
μ
BGA* CSP
(2)
48-Lead TSOP,
48-Ball
μ
BGA CSP
(2)
,
48-Ball VF BGA
(4)
Figure 3
,
Figure 4
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