參數(shù)資料
型號: TE28F160S3-100
廠商: INTEL CORP
元件分類: DRAM
英文描述: 16 Characters x 2 Lines, 5x7 Dot Matrix Character and Cursor
中文描述: 2M X 8 FLASH 2.7V PROM, 100 ns, PDSO56
封裝: 14 X 20 MM, TSOP-56
文件頁數(shù): 19/52頁
文件大?。?/td> 1262K
代理商: TE28F160S3-100
E
28F160S3, 28F320S3
19
ADVANCE INFORMATION
4.2.2
QUERY STRUCTURE OVERVIEW
The Query command causes the flash component
to display the Common Flash Interface (CFI) Query
structure or
“database.” The structure sub-sections
and address locations are summarized in Table 8.
The following sections describe the Query structure
sub-sections in detail.
Table 6. Query Structure
(1)
Offset
Sub-Section Name
Description
00h
Manufacturer Code
01h
Device Code
(BA+2)h
(2)
Block Status Register
Block-specific information
04-0Fh
Reserved
Reserved for vendor-specific information
10h
CFI Query Identification String
Command set ID and vendor data offset
1Bh
System Interface Information
Device timing & voltage information
27h
Device Geometry Definition
Flash device layout
P
(3)
Primary Intel-Specific Extended Query
Table
Vendor-defined additional information
specific to the Primary Vendor Algorithm
NOTES:
1. Refer to Section 4.2.1 and Table 4 for the detailed definition of offset address as a function of device word width and mode.
2. BA = The beginning location of a Block Address (i.e., 08000h is the beginning location of block 1 when the block size is
32 Kword).
3. Offset 15 defines
“P” which points to the Primary Intel-specific Extended Query Table.
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