參數(shù)資料
型號: TE28F001BX-T150
廠商: INTEL CORP
元件分類: DRAM
英文描述: 1-MBIT (128K x 8) BOOT BLOCK FLASH MEMORY
中文描述: 128K X 8 FLASH 12V PROM, 150 ns, PDSO32
封裝: 8 X 20 MM, 1.20 MM HEIGHT, TSOP-32
文件頁數(shù): 19/33頁
文件大?。?/td> 436K
代理商: TE28F001BX-T150
28F001BX-T/28F001BX-B
NOTES:
1. All currents are in RMS unless otherwise noted. Typical values at V
CC
e
5.0V, V
PP
e
12.0V, T
A
e
25
§
C. These currents
are valid for all product versions (packages and speeds).
2. I
CCES
is specified with the device deselected. If the 28F001BX is read while in Erase Suspend mode, current draw is the
sum of I
CCES
and I
CCR
.
3. Erase/Programs are inhibited when V
PP
e
V
PPL
and not guaranteed in the range between V
PPH
and V
PPL
.
CAPACITANCE
(1)
T
A
e
25
§
C, f
e
1 MHz
Symbol
Parameter
Max
Unit
Conditions
C
IN
Input Capacitance
8
pF
V
IN
e
0V
V
OUT
e
0V
C
OUT
Output Capacitance
12
pF
NOTE:
1. Sampled, not 100% tested.
AC INPUT/OUTPUT REFERENCE WAVEFORM
290406–10
A.C. test inputs are driven at V
OH
(2.4 V
TTL
) for a Logic ‘‘1’’ and V
OL
(0.45 V
TTL
) for a Logic ‘‘0’’. Input timing begins at
V
IH
(2.0 V
TTL
) and V
IL
(0.8 V
TTL
). Output timing ends at V
IH
and V
IL
. Input rise and fall times (10% to 90%)
k
10 ns.
STANDARD TEST CONFIGURATION
AC TESTING LOAD CIRCUIT
290406–11
C
L
e
100 pF
C
L
Includes Jig Capacitance
R
L
e
3.3 k
X
HIGH SPEED TEST CONFIGURATION
AC TESTING LOAD CIRCUIT
290406–23
C
L
e
30 pF
C
L
Includes Jig Capacitance
R
L
e
3.3 k
X
19
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