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參數(shù)資料
| 型號： | TDIS |
| 廠商： | Xilinx, Inc. |
| 英文描述： | XC1800 Series of In-System Programmable Configuration PROMs |
| 中文描述： | XC1800系列在系統(tǒng)可編程配置PROM的 |
| 文件頁數(shù)： | 7/16頁 |
| 文件大?。?/td> | 117K |
| 代理商： | TDIS |
R
September 17, 1999 (Version 1.3)
7
XC1800 Series of In-System Programmable Configuration PROMs
The USERCODE instruction gives access to a 32-bit user
programmable scratch pad typically used to supply infor-
mation about the devices’s programmed contents. By using
the USERCODE instruction, a user-programmable identifi-
cation code can be shifted our for examination. This code is
loaded into the USERCODE register during programming
of the XC1800 device. If the device is blank or was not
loaded during programming, the USERCODE register will
contain FFFFFFFFh.
XC1800 TAP Characteristics
The XC1800 family performs both in-system programming
and IEEE 1149.1 boundary-scan (JTAG) testing via a single
4-wire Test Access Port (TAP). This simplifies system
designs and allows standard Automatic Test Equipment to
perform both functions. The AC characteristics of the
XC1800 TAP are described as follows.
TAP Timing
Figure 4
shows the timing relationships of the TAP signals.
These TAP timing characteristics are identical for both
boundary-scan and ISP operations.
TAP AC Parameters
Table 5
shows the timing parameters for the TAP wave-
forms shown in
Figure 4
TCK
TCKMIN
TMSH
TMS
TDI
TDO
TMSS
TDIH
TDOZX
TDOV
TDIS
TDOXZ
Figure 4: Test Access Port Timing
Table 5: Test Access Port Timing Parameters (ns)
Symbol
TCKMIN
TMSS
TMSH
TDIS
TDIH
TDOZX
TDOXZ
TDOV
Parameter
Min
100
10
10
15
25
Max
TCK Minimum Clock Period
TMS Setup Time
TMS Hold Time
TDI Setup Time
TDI Hold Time
TDO Float to Valid Delay
TDI Valid to Float Delay
TDO Valid Delay
35
35
35
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