參數(shù)資料
型號: TDA9898HN/V2
廠商: NXP SEMICONDUCTORS
元件分類: 消費(fèi)家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PQCC48
封裝: 7 X 7 MM, 0.85 MM HEIGHT, PLASTIC, SOT619-1, MO-220, HVQFN-48
文件頁數(shù): 83/103頁
文件大小: 511K
代理商: TDA9898HN/V2
TDA9897_TDA9898_3
NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 03 — 11 January 2008
80 of 103
NXP Semiconductors
TDA9897; TDA9898
Multistandard hybrid IF processing
Tuner AGC; pin TAGC
Integral TAGC loop mode (W6[7:6] = 10); TAGC is current output; unmodulated IF
Vi(IF)(RMS)
RMS IF input voltage
at starting point of tuner
AGC takeover;
Isink(TAGC) = 100 A
W9[4:0] = 0 0000
-
57.9
-
dB
V
W9[4:0] = 1 0000
-
78.7
-
dB
V
W9[4:0] = 1 1111
-
98.2
-
dB
V
αacc(set)TOP
TOP setting accuracy
2
-
+2
dB
Isource
source current
TAGC charge current
normal mode
0.20
0.27
0.34
A
fast mode activated by
internal level detector
710
13
A
Isink
sink current
TAGC discharge current;
VTAGC =1V
400
500
600
A
αacc(set)TOP/T TOP setting accuracy
variation with
temperature
Isink(TAGC) = 100 A;
W9[4:0] = 1 0000
-
0.02
dB/K
RL
load resistance
--M
Vsat(u)
upper saturation
voltage
pin operating as current
output
[2] VP 0.3
-
V
Vsat(l)
lower saturation
voltage
pin operating as current
output
-
0.3
V
αth(fast)AGC
AGC fast mode
threshold
activated by internal fast
AGC detector; I2C-bus
setting corresponds to
W9[4:0] = 1 0000
[2] 6810
dB
td
delay time
before activating; Vi(IF)
below
αth(fast)AGC
60
80
ms
Filter synthesizer PLL; pin LFSYN1
VLFSYN1
voltage on pin
LFSYN1
1.0
-
3.5
V
KO
VCO steepness
fVCO / VLFSYN1
-
3.75
-
MHz/V
KD
phase detector
steepness
ILFSYN1 / VCO
-9
-
A/rad
Isink(o)PD(max)
maximum phase
detector output sink
current
--65
A
Isource(o)PD(max)
maximum phase
detector output
source current
--65
A
Table 56.
Characteristics …continued
VP =5V[1]; Tamb =25 °C; 8 MHz system; see Table 34 and Table 35; CW test input signal is used for specication;
Vi(IF) = 10 mV (RMS); fIF = 36 MHz for low IF output of 5 MHz; IF input from 50 via broadband transformer 1 : 1;
gain controlled amplier adjusted to typical specied output level; measurements taken in test circuit of
Figure 50 and Figure 51 with 4 MHz crystal oscillator reference; unless otherwise specied.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
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