參數(shù)資料
型號(hào): TDA9898HN/V2
廠商: NXP SEMICONDUCTORS
元件分類: 消費(fèi)家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PQCC48
封裝: 7 X 7 MM, 0.85 MM HEIGHT, PLASTIC, SOT619-1, MO-220, HVQFN-48
文件頁數(shù): 61/103頁
文件大?。?/td> 511K
代理商: TDA9898HN/V2
TDA9897_TDA9898_3
NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 03 — 11 January 2008
60 of 103
NXP Semiconductors
TDA9897; TDA9898
Multistandard hybrid IF processing
[1]
Values of video and sound parameters can be decreased at VP = 4.5 V.
[2]
Condition for secure POR is a rise or fall time greater than 2
s.
[3]
This parameter is not tested during the production and is only given as application information for designing the receiver circuit.
[4]
Level headroom for input level jumps during gain control setting.
[5]
BLF(3dB) = 100 kHz (damping factor d = 1.9; calculated with sync level within gain control range). Calculation of the VIF PLL lter can be
done by use of the following formula:
, valid for d
≥ 1.2
,
where:
KO is the VCO steepness
or
; KD is the phase detector steepness
;
R is the loop lter serial resistor (
); C is the loop lter serial capacitor (F); B
LF(
3dB) is the 3 dB LF bandwidth (Hz); d is the damping
factor.
[6]
The VCO frequency offset related to the PC frequency is set to 1 MHz with white picture video modulation.
[7]
AC load; CL < 20 pF and RL >1k. The sound carrier frequencies (depending on TV standard) are attenuated by the integrated sound
carrier traps.
[8]
Condition: luminance range (5 steps) from 0 % to 100 %. Measurement value is based on 4 of 5 steps.
[9]
Measurement using 200 kHz high-pass lter, 5 MHz low-pass lter and subcarrier notch lter (
“ITU-T J.64”).
[10] Modulation VSB; sound carrier off; fvideo > 0.5 MHz.
[11] Sound carrier on; fvideo = 10 kHz to 10 MHz.
[12] The sound carrier trap can be bypassed by setting the I2C-bus bit W2[0] to logic 0; see Table 24. In this way the full composite video
spectrum appears at pin CVBS. The video amplitude is reduced to 1.1 V (p-p).
[13] Measurement condition: with transformer, transmitter pre-correction on; reference is at 1 MHz.
[14] The response time is valid for a VIF input level range from 200
Vto70mV.
[15] See Figure 19 to smooth current pulses.
I2C-bus transceiver; pins SCL and SDA[28]
VIH
HIGH-level input voltage
VCC(I2C-bus) = 5.0 V
[29] 0.6VP
-VP
V
VCC(I2C-bus) = 3.3 V
-
VP
V
VCC(I2C-bus) = 2.5 V
[30] 1.75
-
VP
V
VIL
LOW-level input voltage
VCC(I2C-bus) = 5.0 V
0.3
-
+0.3VP
V
VCC(I2C-bus) = 3.3 V
0.3
-
+1.0
V
VCC(I2C-bus) = 2.5 V
0.3
-
+0.75
V
IIH
HIGH-level input current
10
-
+10
A
IIL
LOW-level input current
10
-
+10
A
VOL
LOW-level output voltage
IOL = 3 mA; for data
transmission (SDA)
-
0.4
V
fSCL
SCL clock frequency
0
-
400
kHz
Table 53.
Characteristics …continued
VP =5V; Tamb =25 °C; see Table 25 for input frequencies; B/G standard is used for the specication (fPC = 38.375 MHz;
fSC = 32.875 MHz; PC / SC = 13 dB; fAF = 400 Hz); input level Vi(IF) = 10 mV (RMS) (sync level for B/G; peak white level
for L); IF input from 50
via broadband transformer 1 : 1; video modulation: Vestigial SideBand (VSB); residual carrier for
B/G is 10 % and for L is 3 %; video signal in accordance with “ITU-T J.63 line 17 and line 330” or “NTC-7 Composite”;
internal Nyquist slope switched on (W7[0] = 0); not dual mode; measurements taken in test circuit of Figure 50 and Figure 51;
unless otherwise specied.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
B
LF
3dB
()
1
2
π
------K
OK D R
=
d
1
2
---RK
OKDC
=
rad
sV
--------
2
π
Hz
V
------
A
rad
--------
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