參數(shù)資料
型號(hào)： TDA9897HL/V3
廠商： NXP SEMICONDUCTORS
元件分類： 消費(fèi)家電
英文描述： SPECIALTY CONSUMER CIRCUIT, PQFP48
封裝： 7 X 7 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT313-2, LQFP-48
文件頁(yè)數(shù)： 87/103頁(yè)
文件大?。?/td> 529K
代理商： TDA9897HL/V3
TDA9897_TDA9898_4
NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 04 — 25 May 2009
84 of 103
NXP Semiconductors
TDA9897; TDA9898
Multistandard hybrid IF processing
[1]
Some parameters can be decreased at VP = 4.5 V.
[2]
This parameter is not tested during production and is only given as application information.
[3]
Output current can be increased by application of single-ended resistor from each output pin to GND. Recommended resistor value is
minimum 1 k
.
[4]
With single-ended load for fIF < 45 MHz RL ≥ 1k and CL ≤ 5 pF to ground and for fIF = 45 MHz to 60 MHz RL =1k and CL ≤ 3 pF to
ground.
[5]
Noise level is measured without input signal but AGC adjusted corresponding to the given input level.
[6]
Set with AGC nominal output voltage as reference. For C/N measurement switch input signal off.
[7]
With single-ended load RL ≥ 1k and CL ≤ 5 pF to ground.
[8]
The tolerance of the reference frequency determines the accuracy of VIF AFC, RIF AFC, FM demodulator center frequency, maximum
FM deviation, sound trap frequency, LIF band-pass cut-off frequency, as well as the accuracy of the synthesizer.
[9]
The value of Cpull determines the accuracy of the resonance frequency of the crystal. It depends on the used type of crystal.
[1]
Calculation of the PLL loop lter by using the following formulae:
, valid for d
≥ 1.2
with the following parameters:
KO = VCO steepness (Hz/V),
N = divider ratio:
,
KD = phase detector steepness (A/rad),
RLFSYN2 = synthesizer loop lter serial resistor (),
CLFSYN2 = synthesizer loop lter serial capacitor (F),
BLF(3dB) = 3 dB LF bandwidth (Hz),
d = damping factor.
[2]
If more than one frequency range is used in the application, then the smallest resistor value should be applied.
Rswoff(FREF)
switch-off resistance
on pin FREF
to switch off reference signal
input by external resistor
wired between pin FREF
and GND
3.9
-
27
k
Iswoff
switch-off current
Rswoff(FREF) = 3.9 k
-
100
A
Rswoff(FREF) =22k
-25
-
A
Table 56.
Characteristics …continued
VP =5V[1]; Tamb =25 °C; 8 MHz system; see Table 33 and Table 34; CW test input signal is used for specication;
Vi(IF) = 10 mV (RMS); fIF = 36 MHz for low IF output of 5 MHz; IF input from 50 via broadband transformer 1 : 1;
gain controlled amplier adjusted to typical specied output level; measurements taken in test circuit of Figure 51 with 4 MHz
crystal oscillator reference; unless otherwise specied.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Table 57.
Conversion synthesizer PLL; loop lter dimensions[1]
fVCO (MHz)
RLFSYN2 (k)[2]
CLFSYN2 (nF)
22 to 29.5
1.5
4.7
30 to 37.5
1.8
4.7
38 to 45.5
2.2
4.7
46 to 53.5
2.7
4.7
57
3.3
4.7
B
LF
3dB
–
()
K
O
N
-------K
DRLFSYN2
=
d
1
2
---R
LFSYN2
2
π
K
O
N
-------K
DCLFSYN2
=
N
f
VCO
0.5 MHz
--------------------
=
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