參數(shù)資料
型號： TDA9897HL/V3
廠商： NXP SEMICONDUCTORS
元件分類： 消費家電
英文描述： SPECIALTY CONSUMER CIRCUIT, PQFP48
封裝： 7 X 7 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT313-2, LQFP-48
文件頁數(shù)： 63/103頁
文件大?。?/td> 529K
代理商： TDA9897HL/V3
TDA9897_TDA9898_4
NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 04 — 25 May 2009
62 of 103
NXP Semiconductors
TDA9897; TDA9898
Multistandard hybrid IF processing
[1]
Values of video and sound parameters can be decreased at VP = 4.5 V.
[2]
Condition for secure POR is a rise or fall time greater than 2
s.
[3]
This parameter is not tested during the production and is only given as application information for designing the receiver circuit.
[4]
Level headroom for input level jumps during gain control setting.
VI
input voltage
VCC(I2C-bus) = 5.0 V;
pin connected to VP
0.88VP
-VP
V
VCC(I2C-bus) = 3.3 V;
pin open-circuit
0.46VP
-
0.58VP
V
VCC(I2C-bus) = 2.5 V;
pin connected to GND
0
-
0.12VP
V
I2C-bus transceiver; pins SCL and SDA[31]
VIH
HIGH-level input voltage
VCC(I2C-bus) = 5.0 V
[32] 0.6VP
-VP
V
VCC(I2C-bus) = 3.3 V
-
VP
V
VCC(I2C-bus) = 2.5 V
[33] 1.75
-
VP
V
VIL
LOW-level input voltage
VCC(I2C-bus) = 5.0 V
0.3
-
+0.3VP
V
VCC(I2C-bus) = 3.3 V
0.3
-
+1.0
V
VCC(I2C-bus) = 2.5 V
0.3
-
+0.75
V
IIH
HIGH-level input current
10
-
+10
A
IIL
LOW-level input current
10
-
+10
A
VOL
LOW-level output voltage
IOL = 3 mA; for data
transmission (SDA)
-
0.4
V
fSCL
SCL clock frequency
0
-
400
kHz
Pins PORT1 or PORT2 or PORT3 operating as open-collector output port
VOL
LOW-level output voltage
I = 2 mA (sink)
-
0.4
V
Isink(o)
output sink current
PORT1
W7[3] = 0
-
3
mA
W7[3] = 1
-
10
A
PORT2; W8[7] = 1
W8[1] = 0
-
3
mA
W8[1] = 1
-
10
A
PORT3; W8[7] = 1
W8[2] = 0
-
3
mA
W8[2] = 1
-
10
A
VOH
HIGH-level output voltage
-
VP + 0.5 V
Table 53.
Characteristics …continued
VP =5V; Tamb =25 °C; see Table 24 for input frequencies; B/G standard is used for the specication (fPC = 38.375 MHz;
fSC = 32.875 MHz; PC / SC = 13 dB; fAF = 400 Hz); input level Vi(IF) = 10 mV (RMS) (sync level for B/G; peak white level
for L); IF input from 50
via broadband transformer 1 : 1; video modulation: Vestigial SideBand (VSB); residual carrier for
B/G is 10 % and for L is 3 %; video signal in accordance with “ITU-T J.63 line 17 and line 330” or “NTC-7 Composite”;
internal Nyquist slope switched on (W7[0] = 0); measurements taken in test circuit of Figure 51; unless otherwise specied.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
相關(guān)PDF資料
PDF描述
TDA9897HN/V3 SPECIALTY CONSUMER CIRCUIT, PQCC48
TDA9898HN/V2 SPECIALTY CONSUMER CIRCUIT, PQCC48
TDA9898HL/V2/S1 SPECIALTY CONSUMER CIRCUIT, PQFP48
TDA9897HL/V2/S1 SPECIALTY CONSUMER CIRCUIT, PQFP48
TDA9897HN/V2 SPECIALTY CONSUMER CIRCUIT, PQCC48
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TDA9897V2 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Multistandard hybrid IF processing
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