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參數(shù)資料
| 型號： | TDA9874AH |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 接收器 |
| 英文描述： | Digital TV sound demodulator/decoder |
| 中文描述： | AM/FM, AUDIO DEMODULATOR, PQFP44 |
| 封裝： | 14 X 14 MM, 2.20 MM HEIGHT, PLASTIC, SOT-205-1, QFP-44 |
| 文件頁數(shù)： | 45/68頁 |
| 文件大?。?/td> | 231K |
| 代理商： | TDA9874AH |
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1999 Dec 03
45
Philips Semiconductors
Preliminary specification
Digital TV sound demodulator/decoder
TDA9874A
Table 56
Auto-select function (TVSM = HIGH and IDSWFM = HIGH): FM mode/NICAM mode for stereo DAC
Note
1.
X = don’t care.
Signal source selection bits SDOS1 and SDOS0 must be set to 0X for FM mode (including FM mode by switching if
auto-mute select is set LOW) or 01 for NICAM mode, when using the auto-select function.
10.3.19 D
IGITAL
A
UDIO
I
NTERFACE
C
ONFIGURATION
R
EGISTER
(DAICONR)
The default setting after Power-on reset is 00000000.
Table 57
Digital Audio Interface Configuration Register (subaddress 21)
Table 58
Description of the DAICONR bits
Table 59
System clock frequency select
OUTPUT CHANNEL SELECTION
MODE
FM IDENT/NICAM SOUND MODE
AUTO-MUTE = HIGH
AND CH2MOD = 10
CSM2
CSM1
CSM0
X
(1)
0
MONO
STEREO
DUAL
0
0
0
1
M/M
M/M
L/R
L/R
A/A
B/B
FM/AM: M/M
FM/AM: M/M
7
6
5
4
3
2
1
0
0
0
0
SYSCL1
SYSCL0
SYSOUT
I
2
SFORM
I
2
SOUT
BIT
SYMBOL
SYSCL1
SYSCL0
SYSOUT
DESCRIPTION
7
6
5
4
3
2
these 3 bits are not used and should be set to logic 0
System clock frequency select:
these 2 bits select the frequency of the system clock;
see Table 59
System clock output on/off:
when SYSOUT = 1 it enables the output of a system (or
master) clock signal at pin SYSCLK. When SYSOUT = 0, the output will be off, thereby
improving EMC performance.
Serial output format:
when I
2
SFORM = 1 it selects an MSB-aligned, MSB-first output
format, i.e. a level change at the word select pin indicates the beginning of a new audio
sample. When I
2
SFORM = 0, it selects the standard I
2
S-bus output format.
I
2
S-bus output on/off:
when I
2
SOUT = 1 it enables the output of serial audio data
(2 pins) plus serial bit clock and word select in a format determined by the I
2
SFORM bit.
The TDA9874A then is an I
2
S-bus master. When I
2
SOUT = 0, the outputs mentioned
will be 3-stated, thereby improving EMC performance.
1
I
2
SFORM
0
I
2
SOUT
SYSCL1
SYSCL0
SYSCLK OUTPUT
FREQUENCY
(MHz)
0
0
1
1
0
1
0
1
256f
s
384f
s
512f
s
768f
s
8.192
12.288
16.384
24.576
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| TDA9874AH/V2,557 | 功能描述:音頻放大器 DIGITAL STEREO DECODER VCR RoHS:否 制造商:STMicroelectronics 產(chǎn)品:General Purpose Audio Amplifiers 輸出類型:Digital 輸出功率: THD + 噪聲: 工作電源電壓:3.3 V 電源電流: 最大功率耗散: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFP-64 封裝:Reel |
| TDA9874AHB | 功能描述:音頻放大器 DIGITAL STEREO DECODER VCR RoHS:否 制造商:STMicroelectronics 產(chǎn)品:General Purpose Audio Amplifiers 輸出類型:Digital 輸出功率: THD + 噪聲: 工作電源電壓:3.3 V 電源電流: 最大功率耗散: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFP-64 封裝:Reel |
| TDA9874APS | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Digital TV sound demodulator/decoder |
| TDA9874H | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Digital TV sound demodulator/decoder |
| TDA9875 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Digital TV Sound Processor DTVSP |
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