參數(shù)資料
型號(hào)： TDA9852H-T
廠商： NXP SEMICONDUCTORS
元件分類： 消費(fèi)家電
英文描述： SPECIALTY CONSUMER CIRCUIT, PQFP44
文件頁數(shù)： 5/40頁
文件大?。?/td> 195K
代理商： TDA9852H-T
1997 Mar 11
13
Philips Semiconductors
Preliminary specication
I2C-bus controlled BTSC stereo/SAP
decoder and audio processor
TDA9852
CHARACTERISTICS
All voltages are measured relative to GND; VCC = 8.5 V; Rs = 600 ; RL =10k; CL = 2.5 nF; AC-coupled; fi = 1 kHz;
Tamb =25 °C; gain control Gv = 0 dB; balance in mid position; loudness off; see Fig.1; unless otherwise specied.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
General
VCC
supply voltage
8.0
8.5
9.0
V
ICC
supply current
75
95
mA
Vref
internal reference voltage at
pin Vref
4.25
V
Input level adjustment control
GLA
input level adjustment control
3.5
+4.0
dB
Gstep
step resolution
0.5
dB
Vi(rms)
maximum input voltage level
(RMS value)
2
V
Zi
input impedance
29.5
35
40.5
k
Stereo decoder
MPXL+R(rms) input voltage level for 100%
modulation L + R; 25 kHz
deviation (RMS value)
input level adjusted via I2C-bus
(L + R; fi = 300 Hz);
monitoring LINE OUT
250
mV
MPXLR
input voltage level for 100%
modulation L
R; 50 kHz
deviation (peak value)
707
mV
MPX(max)
maximum headroom for L + R,
L, R
fmod < 15 kHz; THD < 15%
9
dB
MPXpilot(rms) nominal stereo pilot voltage
level (RMS value)
50
mV
STon(rms)
pilot threshold voltage stereo
on (RMS value)
data STS = 1
35
mV
data STS = 0
30
mV
SToff(rms)
pilot threshold voltage stereo
off (RMS value)
data STS = 1
15
mV
data STS = 0
10
mV
Hys
hysteresis
2.5
dB
OUTL+R
output voltage level for 100%
modulation L + R at LINE OUT
input level adjusted via I2C-bus
(L + R; fi = 300 Hz);
monitoring LINE OUT
480
500
520
mV
α
cs
stereo channel separation L/R
at LINE OUT
aligned with dual tone 14%
modulation for each channel;
see Section “Adjustment
procedure” in Chapter
“Functional description”
fL = 300 Hz; fR = 3 kHz
25
35
dB
fL = 300 Hz; fR = 8 kHz
20
30
dB
fL = 300 Hz; fR = 10 kHz
15
25
dB
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