參數(shù)資料
型號: TDA9330
廠商: NXP Semiconductors N.V.
英文描述: I2C-bus controlled TV display processors
中文描述: 的I2C控制的電視顯示處理器總線
文件頁數(shù): 13/56頁
文件大?。?/td> 228K
代理商: TDA9330
2000 May 08
13
Philips Semiconductors
Preliminary specification
I
2
C-bus controlled TV display processors
TDA933xH series
Table 15
Cathode drive level (15 steps; 3.6 V/step)
Note
1.
The given values are valid for the following conditions:
a) Nominal CVBS input signal.
b) Settings for contrast and white point nominal.
c) Black and blue stretch switched off.
d) Gain of output stage such that no clipping occurs.
e) Beam current limiting not active.
f) Gamma of picture tube is 2.25.
g) The tolerance on these values is approximately
±
3 V.
Table 16
RGB blanking mode
Table 17
Picture tube discharge time
Note
1.
See Chapter “Characteristics”; Fig.15
Table 18
Gain of luminance channel
Table 19
Standby
Table 20
Position of wide blanking (14 steps; 1f
H
mode
0.29
μ
s/step; 2f
H
mode 0.145
μ
s/step)
Note
1.
See Chapter “Characteristics”; note 13.
Table 21
Horizontal free-running frequency in TV mode
Table 22
Vertical scan reference in 2f
H
TV mode
Table 23
Synchronization mode
Table 24
Overvoltage input mode
Table 25
Multi-sync mode
Table 26
Extended slow start mode
CL3
CL2
CL1
CL0
SETTING OF CATHODE
DRIVE AMPLITUDE
(1)
0
1
1
0
0
1
0
0
1
0
0
1
41 V (b-w)
70 V (b-w)
95 V (b-w)
HBL
MODE
0
1
normal blanking (horizontal flyback)
wide blanking
TFBC
MODE
0
1
18.6 ms
25 ms
GAI
MODE
0
1
normal gain [V
28
= 1 V (b-w)]
high gain [V
28
= 0.45 V (p-p)]
STB0
STB1
CONDITION
0
0
1
1
0
1
0
1
horizontal drive off
no action
no action
horizontal drive on
HB3
HB2
HB1
HB0
TIMING OF BLANKING
(1)
1f
H
MODE
2.03
μ
s
0
μ
s
2.03
μ
s
2f
H
MODE
1.015
μ
s
0
μ
s
1.015
μ
s
0
0
1
0
1
1
0
1
1
0
1
HDTV
FREQUENCY
1f
H
MODE
15.65 kHz
16.85 kHz
2f
H
MODE
31.3 kHz
33.7 kHz
0
1
VSR
VERTICAL SCAN REFERENCE
0
1
end of V
D
pulse
start of V
D
pulse
POC
MODE
0
1
synchronization active
synchronization not active
PRD
OVERVOLTAGE MODE
0
1
detection mode
protection mode
VGA
MODE
0
horizontal frequency fixed by internal
reference
multi-sync function switched on
1
ESS
EXTENDED SLOW START MODE
0
1
not active
active
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