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參數(shù)資料
| 型號： | TDA9111 |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | 偏轉(zhuǎn) |
| 英文描述： | HORIZ/VERT DEFLECTION IC, PDIP32 |
| 封裝： | SHRINK, PLASTIC, DIP-32 |
| 文件頁數(shù)： | 41/43頁 |
| 文件大?。?/td> | 2538K |
| 代理商： | TDA9111 |
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TDA9111
7/43
I2C READ/WRITE
Electrical Characteristics (VDD = 5V, Tamb = 25°C)
Note: 1
See also I2C Sub Address Table.
SYNC PROCESSOR
Operating Conditions (VDD = 5V, VCC = 12V, Tamb = 25°C)
Electrical Characteristics (VDD = 5V, VCC = 12V, Tamb = 25°C)
Note: 2
TH is the horizontal period.
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Units
Fscl
Maximum Clock Frequency
Pin 30
400
kHz
Tlow
Low period of the SCL Clock
Pin 30
1.3
s
Thigh
High period of the SCL Clock
Pin 30
0.6
s
Vinth
SDA and SCL Input Threshold
Pins 30, 31
2.2
V
VACK
Acknowledged Output Voltage on SDA
input with 3mA
Pin 31
0.4
V
I2C leak
Leakage current into SDA and SCL with
no logic supply
VDD = 0
Pins 30, 31 = 5 V
20
A
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Units
HSVR
Voltage on H/HVIN Input
Pin 1
0
5
V
MinD
Minimum Horizontal Input Pulses Dura-
tion
Pin 1
0.7
s
Mduty
Maximum Horizontal Input Signal Duty
Cycle
Pin 1
25
%
VSVR
Voltage on VSYNCIN
Pin 2
0
5
V
VSW
Minimum Vertical Sync Pulse Width
Pin 2
5
s
VSmD
Maximum Vertical Sync Input Duty Cycle Pin 2
15
%
VextM
Maximum Vertical Sync Width on TTL H/
Vcomposite
Pin 1
750
s
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Units
VINTH
Horizontal and Vertical Input Logic Level
(Pins 1, 2)
High Level
Low Level
2.2
0.8
V
RIN
Horizontal and Vertical Pull-Up Resistor
Pins 1, 2
250
k
VoutT
Extracted Vsync Integration Time (% of
TH) on H/VComposite
C0 = 820pF
26
35
%
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