參數(shù)資料
型號(hào): TDA9111
廠(chǎng)商: STMICROELECTRONICS
元件分類(lèi): 偏轉(zhuǎn)
英文描述: HORIZ/VERT DEFLECTION IC, PDIP32
封裝: SHRINK, PLASTIC, DIP-32
文件頁(yè)數(shù): 25/43頁(yè)
文件大小: 2538K
代理商: TDA9111
TDA9111
31/43
Figure 16. AGC Loop Block Diagram
3.4 Basic Equations
In first approximation, the amplitude of the ramp
on Pin 23 (VOUT) is:
VOUT - VPOS = (VOSC - VDCMID)
. (1 + 0.3 (V
AMP))
where:
VDCMID = 7/16 VREF (middle value of the ramp
on Pin 22, typically 3.6V)
VOSC = V22 (ramp with fixed amplitude)
VAMP = -1 for minimum vertical amplitude regis-
ter value and +1 for maximum
VPOS is calculated by:
VPOS = VDCMID + 0.4 VP
where VP = -1 for minimum vertical position reg-
ister value and +1 for maximum.
The current available on Pin 22 is:
IOSC =
. V
REF x COSC xf
where COSC = capacitor connected on Pin 22 and
f = synchronization frequency.
3.5 Geometric Corrections
The principle is represented in Figure 17 on
Starting from the vertical ramp, a parabola-shaped
current is generated for E/W correction (also
known as Pin Cushion correction), dynamic hori-
zontal phase control correction, and vertical dy-
namic focus correction.
The parabola generator is made by an analog mul-
tiplier, the output current of which is equal to:
DI = k .(VOUT - VDCMID)
2
where VOUT is the vertical output ramp (typically
between 2 and 5V) and VDCMID is 3.6V
(for VREF-V = 8.2V). The VOUT sawtooth is typical-
ly centered on 3.6V. By changing the vertical posi-
tion, the sawtooth shifts by
±0.4V.
To provide good screen geometry for any end user
adjustment, the TDA9111 has the “geometry
tracking” feature which automatically adapts the
parabola shape, depending on the vertical position
and size.
3
8
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