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參數(shù)資料
| 型號： | TDA8798 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Dual 8-bit, 100 Msps A/D converter with DPGA |
| 中文描述： | 雙8位，100 Msps的的A / D轉(zhuǎn)換器與DPGA |
| 文件頁數(shù)： | 8/24頁 |
| 文件大?。?/td> | 214K |
| 代理商： | TDA8798 |
1999 Sep 16
8
Philips Semiconductors
Objective specification
Dual 8-bit, 100 Msps A/D converter with
DPGA
TDA8798
Table 1
Serial interface truth table; see notes 1 and 2
Notes
1.
2.
‘
←
Di’: shifting LSB and loading new LSB with value Di.
In count-up/count-down mode, the gain control register cannot be incremented above the maximum gain value of 63,
or decremented below the minimum gain value of 0.
SMODE
SCLK
SEN1
SEN2
SDATA
ACTION
0
1
1
U
WAIT
0
1
1
Di
SISR: SISR
←
Di
0
0
1
1
SISR: SISR
←
1
GCR1: GCR1 + 1
0
0
1
0
SISR: SISR
←
0
GCR1: GCR1
1
SISR: SISR
←
1
GCR2: GCR2 + 1
0
1
0
1
0
1
0
0
SISR: SISR
←
0
GCR2: GCR2
1
SISR: SISR
←
1
GCR1: GCR1 + 1
GCR2: GCR2 + 1
SISR: SISR
←
0
GCR1: GCR1
1
GCR2: GCR2
1
WAIT
0
0
0
1
0
0
0
0
1
U
1
Di
SISR: SISR
←
Di
1
U
GCR1: SISR
1
U
GCR2: SISR
1
U
GCR1: SISR
GCR2: SISR
X,
X,
X,
X,
X,
X,
X,
X,
X,
X,
X,
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