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參數(shù)資料
| 型號： | TDA8798 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Dual 8-bit, 100 Msps A/D converter with DPGA |
| 中文描述： | 雙8位，100 Msps的的A / D轉(zhuǎn)換器與DPGA |
| 文件頁數(shù)： | 4/24頁 |
| 文件大小： | 214K |
| 代理商： | TDA8798 |
1999 Sep 16
4
Philips Semiconductors
Objective specification
Dual 8-bit, 100 Msps A/D converter with
DPGA
TDA8798
PINNING
SYMBOL
PIN
DESCRIPTION
DPGA2N
DPGA2
DPGAC2
V
ref2
V
DDA2
VIN2N
VIN2
V
SSA2
V
SSA1
VIN1
VIN1N
V
DDA1
V
ref1
DPGAC1
DPGA1
DPGA1N
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
DPGA2 inverting output
DPGA2 non-inverting output
DPGA2 bandwidth limitation control
ADC2 reference output
DPGA2 analog supply voltage
DPGA2 inverting input voltage
DPGA2 non-inverting input voltage
DPGA2 analog ground
DPGA1 analog ground
DPGA1 non-inverting input voltage
DPGA1 inverting input voltage
DPGA1 analog supply voltage
ADC1 reference output
DPGA1 bandwidth limitation control
DPGA1 non-inverting output
DPGA1 inverting output
Fig.2 External filter.
External filtering may be used between DPGA and ADC to limit the noise bandwidth.
The external filter has a low-pass cut-off frequency of
.
and a high-pass cut-off frequency of
.
Other types of filter may be used if DC biasing is correct.
f
l
3dB
–
(
)
1
2
π
------
R 2
------------------L
R
)
×
≈
f
h
3dB
–
(
)
1
2
π
------
i ADC
)
C
×
R
×
≈
(1) DPGA1/DPGA2
(2) BUF1/BUF2
(3) DPGA1N/DPGA2N
(4) BUF1N/BUF2N
handbook, full pagewidth
FCE267
IOUT
IOUT
Co(DPGA)
TDA8798
TDA8798
10
μ
H
L
10
μ
H
100 nF
100 nF
C
C
L
Co(DPGA)
Ro(DPGA)
DPGA
(1)
BUF
(2)
BUFN
(4)
R
1 k
DPGAN
(3)
Ro(DPGA)
Ri(ADC)
Ri(ADC)
Ci(ADC)
Ci(ADC)
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