參數(shù)資料
型號(hào): TDA8792
廠商: NXP Semiconductors N.V.
英文描述: 3.3 V, 25 MHz 8-bit analog-to-digital converter ADC
中文描述: 3.3伏,25兆赫8位模擬數(shù)字轉(zhuǎn)換器模數(shù)轉(zhuǎn)換器
文件頁(yè)數(shù): 7/20頁(yè)
文件大?。?/td> 148K
代理商: TDA8792
1996 Feb 21
7
Philips Semiconductors
Product specification
3.3 V, 25 MHz 8-bit
analog-to-digital converter (ADC)
TDA8792
Outputs
D
IGITAL OUTPUTS
D7
TO
D0 (
REFERENCED TO
V
SSO
)
V
OL
LOW level output voltage
V
OH
HIGH level output voltage
I
OZ
output current in 3-state mode
I
O
= 1 mA
I
O
=
1 mA
0.4 V < V
O
< V
DDO
0
V
DDO
0.4
10
0.4
V
DDO
+10
V
V
μ
A
Switching characteristics
C
LOCK INPUT
CLK (V
DDA
= 3.15
TO
3.45 V; V
DDD
= 3.15
TO
3.45 V); see Fig.3 and note 1
f
clk(max)
maximum clock frequency
f
clk(min)
minimum clock frequency
t
CPH
clock pulse width HIGH
t
CPL
clock pulse width LOW
25
0.5
16
16
MHz
MHz
ns
ns
Analog signal processing
L
INEARITY
INL
DNL
integral non-linearity
differential non-linearity
ramp input
ramp input
±
0.4
±
0.3
±
0.8
±
0.75
LSB
LSB
B
ANDWIDTH
(V
DDA
= 3.15
TO
3.45 V; V
DDD
= 3.15
TO
3.45 V); T
AMB
= 25
°
C
B
analog bandwidth
full-scale sine wave;
note 2
small signal at mid-scale;
V
i
=
±
10 LSB at
code 128; note 2
full-scale square wave;
Fig.5; note 3
full-scale square wave;
Fig.5; note 3
20
30
MHz
35
MHz
t
STLH
analog input settling time LOW-to-HIGH
8
12
ns
t
STHL
analog input settling time HIGH-to-LOW
8
12
ns
H
ARMONICS
h
1
h
all
fundamental harmonics (full scale)
harmonics (full scale); all components
second harmonics
third harmonics
total harmonic distortion
f
i
= 4.43 MHz
f
i
= 4.43 MHz
0
dB
61
61
58
dB
dB
dB
THD
f
i
= 4.43 MHz
S
IGNAL
-
TO
-
NOISE RATIO
; see Figs 6 and 11; note 4
S/N
signal-to-noise ratio (full scale)
without harmonics;
f
clk
= 25 MHz;
f
i
= 4.43 MHz
46
dB
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
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