參數(shù)資料
型號(hào): TDA8792
廠商: NXP Semiconductors N.V.
英文描述: 3.3 V, 25 MHz 8-bit analog-to-digital converter ADC
中文描述: 3.3伏,25兆赫8位模擬數(shù)字轉(zhuǎn)換器模數(shù)轉(zhuǎn)換器
文件頁(yè)數(shù): 2/20頁(yè)
文件大?。?/td> 148K
代理商: TDA8792
1996 Feb 21
2
Philips Semiconductors
Product specification
3.3 V, 25 MHz 8-bit
analog-to-digital converter (ADC)
TDA8792
FEATURES
8-bit resolution
Sampling rate up to 25 MHz
30 MHz input signal bandwidth (full scale)
High signal-to-noise ratio over a large analog input
frequency range (7.3 effective bits at 4.43 MHz
full-scale input at f
clk
= 25 MHz)
CMOS compatible digital inputs
External reference voltage regulator
Power dissipation only 53 mW (typical)
Standby mode (only 1.2 mW typical)
Low analog input capacitance, no buffer amplifier
required
No sample-and-hold circuit required.
APPLICATIONS
Analog-to-digital conversion for:
General purpose
Hand-held equipment
Mobile telecommunication
Instrumentation
Video.
GENERAL DESCRIPTION
The TDA8792 is a 8-bit analog-to-digital converter (ADC)
for low-voltage, portable applications. It operates at 3.3 V
and converts the analog input signal into 8-bit
binary-coded digital words at a maximum sampling rate of
25 MHz. The output data is valid after a delay of 6 clock
cycles.
QUICK REFERENCE DATA
ORDERING INFORMATION
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
V
DDA
V
DDD
V
DDO
I
DDA
I
DDD
I
DDO
analog supply voltage
digital supply voltage
output stages supply voltage
analog supply current
digital supply current
output stages supply current
2.85
2.70
2.5
3.3
3.3
3.3
12
3
1
3.6
3.6
3.6
20
6
2
V
V
V
mA
mA
mA
f
clk
= 25 MHz; C
L
= 15 pF;
ramp input
f
clk
= 25 MHz; ramp input
f
clk
= 25 MHz; ramp input
INL
DNL
f
clk(max)
P
tot
integral non-linearity
differential non-linearity
maximum clock frequency
total power dissipation
25
±
0.4
±
0.3
53
±
0.8
±
0.75
100
LSB
LSB
MHz
mW
f
clk
= 25 MHz; C
L
= 15 pF;
ramp input
TYPE
NUMBER
PACKAGE
NAME
DESCRIPTION
VERSION
TDA8792M
SSOP24
plastic shrink small outline package; 24 leads; body width 5.3 mm
SOT340-1
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