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參數(shù)資料
| 型號： | TDA8785 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | 8-bit high-speed analog-to-digital converter with gain and offset controls |
| 中文描述： | 8位高速模增益和偏移數(shù)字轉(zhuǎn)換器控制 |
| 文件頁數(shù)： | 10/24頁 |
| 文件大小： | 169K |
| 代理商： | TDA8785 |
1997 Dec 18
10
Philips Semiconductors
Product specification
8-bit high-speed analog-to-digital converter
with gain and offset controls
TDA8785
Digital inputs (pins CLKDAC, CLKADC and DA7 to DA0)
V
IL
V
IH
I
IL
I
IH
Z
i
C
i
LOW-level input voltage
HIGH-level input voltage
LOW-level input current
HIGH-level input current
input impedance
input capacitance
0
2.0
400
4
4.5
0.8
V
CCD
100
V
V
μ
A
μ
A
k
pF
V
IL
= 0.4 V
V
IH
= 2.7 V
f
clk
= 10 MHz
f
clk
= 10 MHz
ADC output format (pin OF);
see Table 2
V
IL
V
IH
V
i(Z)
LOW-level input voltage
HIGH-level input voltage
input voltage in high impedance
state
LOW-level input current
HIGH-level input current
0
2.6
1.20
0.2
V
CCD
V
V
V
I
IL
I
IH
V
IL
= 0.4 V
V
clk
= 2.7 V
370
130
300
450
μ
A
μ
A
ADC digital outputs
V
OL
V
OH
LOW-level output voltage
HIGH-level output voltage
I
OL
= 2 mA
I
OH
=
0.4 mA
0
2.4
0.6
V
CCO
V
V
ADC and DAC switching;
see Fig.4
f
clk(max)
t
CPH
t
CPL
maximum clock frequency
clock pulse width HIGH
clock pulse width LOW
note 2
30
12
12
MHz
ns
ns
Analog processing;
note 3
INL
integral non-linearity
ramp input (full-scale);
0 to 20 dB gain
ramp input (full-scale);
0 to 20 dB gain
f
i
= 2 MHz
0 dB gain
10 dB gain
20 dB gain
3 dB
±
0.7
±
1.8
LSB
DNL
differential non-linearity
±
0.2
±
0.7
LSB
S/N
signal-to-noise ratio
(without harmonics)
47
45
43
100
dB
dB
dB
MHz
B
bandwidth
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX. UNIT
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| TDA8785H | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:8-bit high-speed analog-to-digital converter with gain and offset controls |
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