參數(shù)資料
型號(hào)： TDA8754EL/17/C1
廠商： NXP SEMICONDUCTORS
元件分類： ADC
英文描述： 3-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PBGA208
封裝： 17 X 17 MM, 1.05 MM HEIGHT, PLASTIC, MO-192, SOT774-1, LBGA-208
文件頁(yè)數(shù)： 38/57頁(yè)
文件大小： 259K
代理商： TDA8754EL/17/C1
TDA8754_7
NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 07 — 3 May 2007
43 of 57
NXP Semiconductors
TDA8754
Triple 8-bit video ADC up to 270 Msample/s
GE(rms)
full-scale channel-to-channel
matching (RMS value)
minimum coarse gain;
code = 32
-
2.5
%
R, G and B clamp
Nclamp
clamp level accuracy
fCLK = 25 MHz; clamp
code = 20
--1
bit
Phase-Locked Loop (PLL); see Table 76
JPLL(p-p)
long term PLL phase jitter
(peak-to-peak value)
fclk = 270 MHz; DR = 2160
-
390
480
ps
DR
divider ratio
100
-
4095
fPLL
output clock frequency
10
-
270
MHz
fref
reference clock frequency
15
-
150
kHz
step
number of phase shift steps
from drift
--2
step
phase shift step
-
11.25
-
deg
Analog-to-Digital Converters (ADCs); minimum coarse gain
fs(max)
maximum sampling frequency
270
-
MHz
INL
integral non-linearity
fclk = 270 MHz; fi = 10 MHz
-
±0.6
±1.3
bit
DNL
differential non-linearity
fclk = 270 MHz; fi = 10 MHz
-
±0.25
±0.6
bit
ENOB
effective number of bits
fclk = 270 MHz; fi = 10 MHz
-
7.6
-
bit
αct
crosstalk
fclk = 270 MHz
-
45
dB
S/N
signal-to-noise ratio
fclk = 270 MHz; fi = 10 MHz
-
48
-
dB
SFDR
spurious free dynamic range
fclk = 270 MHz; fi = 10 MHz
48
55
-
dB
THD
total harmonic distortion
fclk = 270 MHz; fi = 10 MHz
-
55
48
dB
Data timing; 10 pF load; see Figure 4
td(o)
output delay
-
4
5.2
ns
th(o)
output hold time
1.9
-
ns
tsu(o)
output setup time
-
6
ns
LV-TTL digital inputs and outputs
Input pins CKEXT, COAST, VSYNC1, VSYNC2, HSYNC1, HSYNC2, CHSYNC1, CHSYNC2, PWD, A0, DIS, TCK and CLP
VIL
LOW-level input voltage
0
-
0.8
V
VIH
HIGH-level input voltage
2.0
-
VCCD(TTL) V
Output pins RA[7:0], RB[7:0], GA[7:0], GB[7:0], BA[7:0], BB[7:0], ROR, BOR, GOR, CKDATA, TDO, DEO, HPDO, HSYNCO,
VSYNCO, FIELDO, CLPO, CKREFO and CSYNCO
VOL
LOW-level output voltage
IOH = 1 mA
-
0.4
V
VOH
HIGH-level output voltage
IOL = 1 mA
2.4
-
V
Data clock output
Output pin CKDATA
fCKDATA(max)
maximum buffer frequency
-
140
-
MHz
Data outputs
Output pins RA[7:0], RB[7:0], GA[7:0], GB[7:0], BA[7:0], BB[7:0], ROR, BOR, GOR, DEO, HSYNCO and CSYNCO
fdata(max)
maximum buffer frequency
-
70
-
MHz
Table 75.
Characteristics …continued
Tamb =25 °C unless otherwise specied.
Symbol
Parameter
Conditions
Min
Typ[1]
Max
Unit
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TDA8754HL/11/C1,55 功能描述:視頻模擬/數(shù)字化轉(zhuǎn)換器集成電路 TRPL 8BIT VIDEO ADC RoHS:否 制造商:Texas Instruments 輸入信號(hào)類型:Differential 轉(zhuǎn)換器數(shù)量:1 ADC 輸入端數(shù)量:4 轉(zhuǎn)換速率:3 Gbps 分辨率:8 bit 結(jié)構(gòu): 輸入電壓:3.3 V 接口類型:SPI 信噪比: 電壓參考: 電源電壓-最大:3.45 V 電源電壓-最小:3.15 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:TCSP-48 封裝:Reel
TDA8754HL/11/C1/R1 功能描述:視頻模擬/數(shù)字化轉(zhuǎn)換器集成電路 3X8-BIT VID INTERFACE 110 MSPS RoHS:否 制造商:Texas Instruments 輸入信號(hào)類型:Differential 轉(zhuǎn)換器數(shù)量:1 ADC 輸入端數(shù)量:4 轉(zhuǎn)換速率:3 Gbps 分辨率:8 bit 結(jié)構(gòu): 輸入電壓:3.3 V 接口類型:SPI 信噪比: 電壓參考: 電源電壓-最大:3.45 V 電源電壓-最小:3.15 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:TCSP-48 封裝:Reel
TDA8754HL/11/C1/R1,518 制造商:NXP Semiconductors 功能描述:
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