參數資料
型號： TDA7513T
廠商： STMICROELECTRONICS
元件分類： 接收器
英文描述： AM/FM, AUDIO SINGLE CHIP RECEIVER, PQFP80
封裝： 14 X 14 MM, 1.40 MM HEIGHT, TQFP-80
文件頁數： 25/84頁
文件大?。?/td> 845K
代理商： TDA7513T
TDA7513T
Functional description
A few programmable phase errors (D0, D1) are available for inlock detection. The count of
detected inlock informations to release the inlock signal is adjustable (D2, D3), to avoid
switching to low current during a frequency jump.
3.3.5
Low noise CMOS op-amp
An internal voltage divider at pin #LFREF is connected to the positive input of the low noise
op-amp. The charge pump output is connected to the negative input. This internal amplifier
in cooperation with external components provides the active loop filter. Only one loop filter
connection is provided because the same reference frequency is used for both AM and FM
operation. The pin #LFHC is connected in such a way as to partially shunt the loop filter in
order to decrease the time constant of the filter itself during jumps with high current mode
activated.
3.3.6
IF counter block
The input signal for FM and AM has the same structure although FM IF is measured at IF1
(10.7MHz) and AM IF is measured at IF2 (450kHz). The degree of integration is adjustable
to up to eight different measuring cycle times. The tolerance of the accepted count value is
adjustable to reach the optimum compromise between search speed and evaluation
precision.
T center frequency of the measured count value is adjustable to fit the IF-filter tolerance.
3.3.7
The IF counter mode
The IF counter works in 2 modes controlled by the IFCM register.
3.3.8
Sampling timer
A 14-bit programmable (IRC) sampling timer generates the gate signal for the main counter.
In FM mode a 6.25kHz frequency reference is generated for this purpose, whereas in AM
mode this reference becomes 1kHz. These reference frequencies are further divided to
generate the measurement time windows (160us - 320
μs ... 20.48ms for FM, 1ms - 2ms …
128ms for AM).
3.3.9
Intermediate frequency main counter
This counter is a 11 - 21-bit synchronous autoreload down counter. Five bits (CF) are
programmable to allow the adjustment to the peak of the IF-filter response. The counter
length is automatically adjusted to the chosen sampling time and counter mode (FM, AM).
The IF counter is also used to automatically perform the stereo decoder 456kHz VCO
frequency adjustment.
At the start the counter will be loaded with a value equivalent to the expected number of
zero-crossing in the sampling time window (tSample x fIF ). If the correct frequency is applied
to the IF counter input, at the end of the sampling time the main counter will have either a 0h
state or a 1FFFFFh state stored.
A deviation from the expected IF will result in a difference of the counter final state from
either of these values. The counter final state is then compared to either 0h or 1FFFFFh
minus a number of LSB's determined by the acceptable frequency window programming
(EW).
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