參數(shù)資料
型號: TDA7500ATR
廠商: STMICROELECTRONICS
元件分類: 消費家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PQFP100
封裝: ROHS COMPLIANT, TQFP-100
文件頁數(shù): 22/41頁
文件大?。?/td> 431K
代理商: TDA7500ATR
29/40
TDA7500A
FUNCTIONAL DESCRIPTION
The TDA7500A IC broken up into two distinct blocks. One block contains the two DSP Cores and their associ-
ated peripherals. The other contains the ADC, DAC and the RDS filter, demodulator and decoder.
24-BIT DSP CORE
The two DSP cores are used to process the audio and FM/AM data, coming from the ADC, either any kind of
digital data coming via SPDIF or SAI. After the digital signal processing these data are sent to the DAC for an-
alog conversion. Functions such as volume, tone, balance, and fader control, as well as spatial enhancement
and general purpose signal processing may be performed by the DSP0. When FM/AM mode is selected, DSP1
is fully devoted to AM/FM processing. Nevertheless it can be used for any kind of different application, when a
different input source is selected.
Some capabilities of the DSPs are listed below:
s
Single cycle multiply and accumulate with convergent rounding and condition code generation
s
2 x 56-bit Accumulators
s
Double precision multiply
s
Scaling and saturation arithmetic
s
48-bit or 2 x 24-bit parallel moves
s
64 interrupt vector locations
s
Fast or long interrupts possible
s
Programmable interrupt priorities and masking
s
8 each of Address Registers, Address Offset Registers and Address Modulo Registers
s
Linear, Reverse Carry, Multiple Buffer Modulo, Multiple Wrap-around Modulo address arithmetic
s
Post-increment or decrement by 1 or by offset, Index by offset, predecrement address
s
Repeat instruction and zero overhead DO loops
s
Hardware stack capable of nesting combinations of 7 DO loops or 15 interrupts/subroutines
s
Bit manipulation instructions possible on all registers and memory locations, also Jump on bit test
s
4 pin serial debug interface
s
Debug ccess to all internal registers, buses and memory locations
s
5 word deep program address history FIFO
s
Hardware and software breakpoints for both program and data memory accesses
s
Debug Single stepping, Instruction injection and Disassembly of program memory
DSP PERIPHERALS
There are a number of peripherals that are tightly coupled to the two DSP Cores. Same of the peripherals are
connected to DSP 0 others are connected to DSP1.
s
5.5k x 24-Bit Program RAM for DSP0
s
1k x 24-Bit X-Data RAM for DSP0
s
1k x 24-Bit Y-Data RAM for DSP0
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2k x 24-Bit Program RAM for DSP1
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1k x 24-Bit X-Data RAM for DSP1
s
1k x 24-Bit Y-Data RAM for DSP1
s
Serial Audio Interface (SAI)
s
SPDIF receiver with sampling rate conversion
相關PDF資料
PDF描述
TDA7500 SPECIALTY CONSUMER CIRCUIT, PQFP100
TDA7502013TR SPECIALTY CONSUMER CIRCUIT, PQFP44
TDA7502E013TR SPECIALTY CONSUMER CIRCUIT, PQFP44
TDA7503 SPECIALTY CONSUMER CIRCUIT, PQFP100
TDA7511 AM/FM, AUDIO SINGLE CHIP RECEIVER, PQFP64
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