參數(shù)資料
型號: TDA5345HT
廠商: NXP SEMICONDUCTORS
元件分類: 運(yùn)動控制電子
英文描述: 5 V spindle & VCM driver combo
中文描述: DISK DRIVE MOTOR CONTROLLER, 2 A, PQFP64
封裝: LOW PROFILE, PLASTIC, TQFP-64
文件頁數(shù): 16/44頁
文件大?。?/td> 213K
代理商: TDA5345HT
1999 June 10
16
Philips Semiconductors
Preliminary specification
5 V spindle & VCM driver combo
TDA5345HT
programmed to be the
maximum allowable delay value
.
If
Zc
measured
is lower than ComDeLim, the next commutation delay will be
Zc
measured
divided by 2.
If
Zc
measured
is higher than ComDeLim, the next commutation delay will be ComDeLim value divided by 2.
ComDeLim can be limited to guarantee a faster lock after the motor has gone out of lock.
The clock used in the commutation control block is obtained by dividing the master clock of the chip (CLOCK: pin #38)
by a clock divider (PRESCALER). This internal clock is named ClockOutPrescaler.
All the delays described above (Blank, WatchDog and StartUp) are generated by a down-counter (called TIMER1). The
time between two zero-crossings is measured by a second counter called TIMER2. The commutation delay and the
ComDeLim are derived from TIMER2. Both counters are clocked on ClockOutPrescaler clock, which is programmable
through the serial interface, using bit 7 & 8 of register #0: (ClockOutPrescaler should be chosen as typically 1 MHz)
Table 4
Clock configurations
TIMER
1
Timer 1 is used to generate Blank, WatchDog and StartUp delays: It loads one of these programmed values and counts
down till it reaches zero. All LSB bits are internally set to ‘1’: bits [2:0] for Blank, bits [8:0] for WatchDog, bits [13:0] for
StartUp.
Calculations:
The actual delay will be: Delay = (Value * Step) + min, where:
Value
= the decimal value programmed in the considered register
Step size
= 2
LSB
/ ClockOutPrescaler
Min
= (2
LSB
-1) / ClockOutPrescaler(bits from 0 to (LSB-1) are internally set to 1)
maximum
= (2
(MSB+1)
-1) / ClockOutPrescaler
PRESCFACTOR1
(BIT 8, REG#0)
PRESCFACTOR0
(BIT 7, REG#0)
CLOCKOUTPRESCALER
0
0
CLOCK/4
0
1
CLOCK/8
1
0
CLOCK/16
1
1
CLOCK/32
Fig.9 Timer 1 configuration.
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
Blank
WatchDog
StartUp
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