
Functional Description
3 - 10
TDA 5221
preliminary
Wireless Components
Target Specification, October 2001
ing case and interference scenario to be expected during operation. The opti-
mum choice of AGC time constant and the threshold voltage is described in
Section 4.1.
3.4.2
Mixer
The Double Balanced Mixer downconverts the input frequency (RF) in the
range of 310-350MHz to the intermediate frequency (IF) at 10.7MHz with a vol-
tage gain of approximately 21dB by utilising either high- or low-side injection of
the local oscillator signal. In case the mixer is interfaced only single-ended, the
unused mixer input has to be tied to ground via a capacitor. The mixer is fol-
lowed by a low pass filter with a corner frequency of 20MHz in order to suppress
RF signals to appear at the IF output (
IFO
pin). The IF output is internally con-
sisting of an emitter follower that has a source impedance of approximately
330
=
to facilitate interfacing the pin directly to a standard 10.7MHz ceramic filter
without additional matching circuitry.
3.4.3
PLL Synthesizer
The Phase Locked Loop synthesizer consists of a VCO, an asynchronous
divider chain, a phase detector with charge pump and a loop filter and is fully
implemented on-chip. The VCO is including spiral inductors and varactor
diodes. The
FSEL
pin (Pin11) has to be left open. The tuning range of the VCO
was designed to guarantee over production spread and the specified tempera-
ture range a receive frequency range between 300 and 340 MHz depending on
whether high- or low-side injection of the local oscillator is used. The oscillator
signal is fed both to the synthesiser divider chain and to a divider that is dividing
the signal by 2 before it is applied to the downconverting mixer. Local oscillator
high side injection has to be used for receive frequencies between approxi-
mately 300 and 320 MHz, low side injection for receive frequencies between
320 and 340MHz - see also Section 4.4..
3.4.4
Crystal Oscillator
The calculation of the value of the necessary quartz load capacitance is shown
in Section 4.3, the quartz frequency calculation is explained in Section 4.4.
3.4.5
Limiter
The Limiter is an AC coupled multistage amplifier with a cumulative gain of
approximately 80 dB that has a bandpass-characteristic centred around
10.7 MHz. It has a typical input impedance of 330
=
to allow for easy interfacing
to a 10.7 MHz ceramic IF filter. The limiter circuit also acts as a Receive Signal
Strength Indicator (RSSI) generator which produces a DC voltage that is