參數(shù)資料
型號(hào): TDA4887PS
廠商: NXP SEMICONDUCTORS
元件分類: 音頻/視頻放大
英文描述: 160 MHz bus-controlled monitor video preamplifier
中文描述: 3 CHANNEL, VIDEO PREAMPLIFIER, PDIP24
封裝: 0.400 INCH, PLASTIC, SDIP-24
文件頁(yè)數(shù): 34/68頁(yè)
文件大小: 425K
代理商: TDA4887PS
2001 Oct 19
34
Philips Semiconductors
Product specification
160 MHz bus-controlled monitor video
preamplifier
TDA4887PS
Table 4
Subaddress and data byte format
Notes
1.
2.
3.
See Table 3 (Subaddress byte format).
The least significant bit (LSB) of an analog alignment register is defined as AX0 (data bit D0).
Under certain conditions the nominal values lead to nominal colour signals, etc. (see notes 1 and 3 of
Chapter “Characteristics” and Figs 4 to 6).
After power-up and after internal Power-on reset of the I
2
C-bus the registers are set to the following values:
a) Control bit FPOL to logic 1.
b) Control bits DISV, DISO and BRI to logic 0.
c) All other alignment registers to logic 0 (minimum value for control registers).
Data bit.
X means don’t care but the bits are preferably set to logic 0 for software compatibility with other video ICs that have
the same slave address.
4.
5.
FUNCTION
SUBADDRESS
(1)
DATA BYTE
(2)
NOMINAL
VALUE
(3)
DIRECT
MODE
BUFFERED
MODE
D7
(4)
D6
(4)
D5
(4)
D4
(4)
D3
(4)
D2
(4)
D1
(4)
D0
(4)
Control register
Brightness control
Contrast control
OSD contrast
control
Gain control
channel 1
Gain control
channel 2
Gain control
channel 3
Black level
reference channel 1
Black level
reference channel 2
Black level
reference channel 3
Black level for
AC coupling
Depth of pedestal
blanking
00H
01H
02H
03H
80H
81H
82H
83H
X
(5)
A17
A27
X
(5)
BRI
A16
A26
X
(5)
X
(5)
A15
A25
X
(5)
X
(5)
A14
A24
X
(5)
FPOL DISV DISO
A13
A12
A23
A22
A33
A32
X
(5)
A10
A20
A30
08H
40H
FFH
0FH
A11
A21
A31
04H
84H
A47
A46
A45
A44
A43
A42
A41
A40
FFH
05H
85H
A57
A56
A55
A54
A53
A52
A51
A50
FFH
06H
86H
A67
A66
A65
A64
A63
A62
A61
A60
FFH
07H
87H
A77
A76
A75
A74
A73
A72
A71
A70
08H
88H
A87
A86
A85
A84
A83
A82
A81
A80
09H
89H
A97
A96
A95
A94
A93
A92
A91
A90
0AH
8AH
X
(5)
X
(5)
X
(5)
X
(5)
X
(5)
AA2
AA1
AA0
0BH
8BH
X
(5)
X
(5)
X
(5)
X
(5)
X
(5)
X
(5)
AB1
AB0
00
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