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參數(shù)資料
| 型號： | TDA4887 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | 160 MHz bus-controlled monitor video preamplifier |
| 中文描述： | 160 MHz的總線控制顯示器的視頻前置放大器 |
| 文件頁數(shù)： | 9/68頁 |
| 文件大?。?/td> | 425K |
| 代理商： | TDA4887 |
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2001 Oct 19
9
Philips Semiconductors
Product specification
160 MHz bus-controlled monitor video
preamplifier
TDA4887PS
7.4
Pedestal blanking
The pedestal blanking is driven by a 2-bit DAC via the
I
2
C-bus. Pedestal blanking inserts a negative output level
related to the reference black level (should always
correspond to the ‘extended cut-off voltage’ at the
cathode) during blanking and output clamping. In this way
retrace lines during vertical flyback are suppressed
(blanking to spot cut-off). The depth of pedestal blanking
(voltage difference between reference black level and
pedestal black level) is bus-controlled (2 bits, 0 to 13.5%
of the maximum colour signal) and does not change with
any other control or adjustment. The pedestal blanking
level is used for output clamping instead of the reference
black level (see Section 7.5). If the pedestal blanking level
is the most negative output signal and if the application is
for AC-coupled cathodes, a very simple black level
restoration with a DC diode clamp can be used.
7.5
Output clamping and feedback references
Theaimoftheoutputclampingistosetthereferenceblack
level of the signal outputs to a value which corresponds to
the ‘extended cut-off voltage’ of the CRT cathodes. With
missing output clamping pulses the integrated storage
capacitors will be discharged resulting in output signals
going to switch-off voltage. If using pedestal blanking, the
pedestal black level will be controlled by output clamping
(see Fig.5). It is therefore not allowed to change the
pedestal depth after black level adjustment of the monitor.
Feedback references are driven via the I
2
C-bus and
controlled by an 8-bit DAC for DC feedback references or
by a 3-bit DAC for AC feedback references:
1.
DC-coupled cathodes
(control bit FPOL = 0)
Thecathodevoltageisdividedbyavoltagedividerand
fed back to the IC (pins FB/R
1
, FB/R
2
and FB/R
3
).
During the output clamping pulse it is compared with a
bus-controlled feedback reference voltage with a
range of approximately 5.75 to 3.95 V. Any difference
will lead to a reference black level correction
(subaddress 0BH = 00H) or pedestal black level
correction (subaddress 0BH
≠
00H) by charging or
discharging the integrated capacitors that store the
black level information between the output clamping
pulses. The DC voltages of the output stages should
be designed in such a way that the reference black
level/pedestal black level is within the range of
0.5 to 2.4 V at the preamplifier output.
For correct operation it is necessary that there is
enough headroom for ultra black signals (negative
brightnesssettingandpedestalblanking).Anyclipping
with the video supply voltage at the cathode can
disturb the signal rise/fall times or the black level
stabilization.
After power-on, the control bit FPOL is set to logic 1
and all alignment registers are set to logic 0 resulting
in the reference black level at its lowest level (0.53 V)
with no output signal. Normal operation starts after all
data registers have been refreshed via the I
2
C-bus.
Brightness control with grey scale tracking (control bit
BRI = 0) can be used as well as brightness control
without grey scale tracking (control bit BRI = 1) using
the mixing function of bus-controlled brightness offset
(0 to
1.4 V) to feedback reference voltages
(see Section 7.2).
AC-coupled cathodes
(control bit FPOL = 1)
For applications with AC-coupled cathodes the signal
outputs are fed back internally. During the output
clamping pulse they are compared with a bus
controlled feedback reference voltage (0.5 to 1.9 V).
These values ensure a good adaptability to both
discrete and integrated post amplifiers.
For black level restoration, the DAC outputs (FB/R
1
,
FB/R
2
and FB/R
3
) with a range of approximately
3.95 to 5.75 V can be used. Pedestal blanking is
recommended because it allows use of a simple
restoration circuit. After power-on, the DAC outputs
will be at maximum output voltage (register value
logic 0),sowhenusinganon-invertingamplifierforthe
reference voltages the monitor will start with black.
Brightness control with grey scale tracking (control bit
BRI = 0) can be used as well as simple brightness
control without grey scale tracking (control bit BRI = 1)
using the mixing function of bus controlled brightness
offset (0 to
1.4 V) to DAC output voltages
(see Section 7.2).
2.
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| TDA4887PS | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:160 MHz bus-controlled monitor video preamplifier |
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