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參數(shù)資料
| 型號： | TD7626FN |
| 元件分類： | PLL合成/DDS/VCOs |
| 英文描述： | PHASE LOCKED LOOP, PDSO16 |
| 封裝： | 0.225 INCH, 0.65 MM PITCH, PLASTIC, SSOP-16 |
| 文件頁數(shù)： | 12/14頁 |
| 文件大?。?/td> | 338K |
| 代理商： | TD7626FN |
TD7626F,TD7626FN
2001-03-01 7/14
DATA FORMAT
a) WRITE MODE
BYTE
MSB
LSB
1
ADDRESS Byte
1
0
MA1
MA0
R / W = 0
ACK
2
DIVIDER Byte (1)
0
2
14
2
13
2
12
2
11
2
10
2
9
2
8
ACK
3
DIVIDER Byte (2)
2
7
2
6
2
5
2
4
2
3
2
1
2
0
ACK (L)
4
CONTROL Byte
1
CP
T1
T0
TS2
TS1
TS0
OS
ACK
5
BAND SW Byte
P7
P6
P5
P4
P3
X
P0
ACK (L)
(L)
: DATA LATCH
×
: DON’T Care
ACK : Acknowledgment
b) READ MODE
BYTE
MSB
LSB
1
ADDRESS Byte
1
0
MA1
MA0
R / W = 1
ACK
2
STATUS Byte
0
FL
IP7
IP5
IP4
A2
A1
A0
ACK
ACK : Acknowledgment
DATA DETAILS
MA1, MA0 :Programmable address bits
(Indicate applied voltage of pin 10 and corresponding address setting.)
ADDRESS PIN APPLIED VOLTAGE
MA1
MA0
0~0.2×VCC
0
0.3×VCC~0.7×VCC
1
0
0~VCC
0
1
0.8×VCC~VCC
1
CP
: Charge pump current setting
[0] : 50A (Typ.)
[1] : 170A (Typ.)
T1
: Test mode switching
[0] : NORMAL mode
[1] : TEST mode
T0
:Charge pump control setting
[0] : Charge pump ON
[1] : Charge pump OFF
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