參數(shù)資料
型號： TC90A92AFG
元件分類： 消費家電
英文描述： SPECIALTY CONSUMER CIRCUIT, PQFP100
封裝： 14 X 20 MM, 0.65 MM PITCH, PLASTIC, QFP-100
文件頁數(shù)： 29/34頁
文件大小： 459K
代理商： TC90A92AFG
TC90A92AFG
Pin
No.
Pin Name
Function
Durabl
e
voltage
(V)
I/O
Circuit
System
(Analog or
Digtal)
DC of
standard
operation
iuj
Analog signal
effective level
iVp-pj
51 VDDRAM2
Power supply for internal DRAM
1.5
VDD
Digital
1.5
-
52 VSSRAMD1 GND for internal DRAM
0
GND
Digital
0
-
53 VDDRAMD1 Power supply for internal DRAM
2.5
VDD
Digital
2.5
-
54 YOUT3
Digital video port output
3.3
OUT
Digital
-
55 YOUT2
3.3
OUT
Digital
-
56 YOUT1
Digital video port output
(In case 8bit output mode : fixed to Low)
3.3
OUT
Digital
-
57 YOUT0
3.3
OUT
Digital
-
58 CKOUT
System Clock output terminal for digital video signal output
656 : 27MHz 601 : 13.5MHz
3.3
OUT
Digital
-
59 DVDD4
Power supply for Logic circuit
1.5
VDD
Digital
1.5
-
60 COUT0
bbbr digital video signal output (LSBj
i656F
fixed Low 601F
CbCrj
iIn case 16bit mode: LSB and 2’nd LSB are fixed Low)
3.3
OUT
Digital
-
61 COUT1
3.3
OUT
Digital
-
62 DVSS4
GND for Logic circuit
0
GND
Digital
0
-
63 COUT2
bbbr digital video signal output
3.3
OUT
Digital
-
64 VDDIO3
Power supply for I/O
3.3
VDD
Digital
3.3
-
65 COUT3
bbbr digital video signal output
3.3
OUT
Digital
-
66 COUT4
3.3
OUT
Digital
-
67 VSSIO3
GND for I/O
0
GND
Digital
0
-
68 COUT5
bbbr digital video signal output
3.3
OUT
Digital
-
69 COUT6
3.3
OUT
Digital
-
70 DVDD5
Power supply for Logic circuit
1.5
VDD
Digital
1.5
-
71 COUT7
bbbr digital video signal output
3.3
OUT
Digital
-
72 COUT8
3.3
OUT
Digital
-
73 DVSS5
GND for Logic circuit
0
GND
Digital
0
-
74 COUT9
bbbr digital video signal output iMSBj
3.3
OUT
Digital
-
75 HDOUT
Horizontal reference timing pulse
3.3
OUT
Digital
-
76 VDOUT
Vertical reference timing pulse
3.3
OUT
Digital
-
77 OEPK
Field detection output / Pedestal pulse output
3.3
OUT
Digital
-
78 UVFLAG
Reference pulse of multiplexed Cb/Cr signal
3.3
OUT
Digital
-
79 VBIREADY
Reference pulse of IIC read for VBI data slice
Function (Hi level at 23 line and 286 line)
3.3
OUT
Digital
-
80 YCLAMPP
Clamp signal for YIN
3.3
OUT
Digital
-
81 BIASYAD
The bias terminal for internal 10bit ADC
2.5
Bypass
Analog
0.8
-
82 VRTYAD
The reference top voltage terminal of internal
10bit ADC
2.5
Bypass
Analog
1.75
-
83 VRMYAD
The reference middle voltage terminal of
Internal 10bit ADC
2.5
Bypass
Analog
1.25
-
84 VSSYAD
GND for internal 10bit ADC
0
GND
Analog
0
-
85 YIN
Analog CVBS/Y signal input terminal for
Internal 10bit ADC
2.5
IN
Analog
-
VDDYADx0.4
86 VDDYAD
Power supply for internal 10bit ADC
2.5
VDD
Analog
2.5
-
87 VRBYAD
The reference bottom voltage terminal of
Internal 10bit ADC
2.5
Bypass
Analog
0.75
-
88 BIASCAD
The bias terminal for internal 8bit ADC
2.5
Bypass
Analog
0.8
-
89 VRTCAD
The reference top voltage terminal of
Internal 8bit ADC
2.5
Bypass
Analog
1.75
-
90 CIN
Analog C signal input terminal for Internal
8bit ADC
2.5
IN
Analog
1.25
VDDCADx0.4
91 VDDCAD
Power supply for internal 8bit ADC
2.5
VDD
Analog
2.5
-
92 CRIN
Analog Cr signal input terminal for Internal
8bit ADC
2.5
IN
Analog
-
VDDCADx0.4
93 VSSCAD
GND for internal 8bit ADC
0
GND
Analog
0
-
94 CBIN
Analog Cb signal input terminal for Internal
8bit ADC
2.5
IN
Analog
-
VDDCADx0.4
95 VRBCAD
The reference bottom voltage terminal of internal 8bit ADC
2.5
Bypass
Analog
0.75
-
96 VDDDA
Power supply for internal DAC of NCO
2.5
VDD
Analog
2.5
-
97 DAOUT
Output terminal of DAC of NCO
2.5
OUT
Analog
2
VDDDA -VDDDA*0.
6
98 VSSDA
GND for internal DAC of NCO
0
GND
Analog
0
-
99 BIASDA
The bias terminal for internal DAC
2.5
Bypass
Analog
0.9
-
100 VREFDA
The reference voltage terminal of DAC
2.5
Bypass
Analog
1.5
-
(Note) Please the capacitor of the power supply terminal and the BIASAD terminal is placed near the terminal.
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