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參數(shù)資料
| 型號： | TB3R1LD |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | QUAD DIFFERENTIAL PECL RECEIVERS |
| 中文描述： | 四路差分PECL接收機(jī) |
| 文件頁數(shù)： | 8/11頁 |
| 文件大?。?/td> | 267K |
| 代理商： | TB3R1LD |
www.ti.com
APPLICATION INFORMATION
Power Dissipation
The power dissipation rating, often listed as the
package dissipation rating, is a function of the ambi-
ent temperature, T
A
, and the airflow around the
device. This rating correlates with the device's maxi-
mum junction temperature, sometimes listed in the
absolute maximum ratings tables. The maximum
junction temperature accounts for the processes and
materials used to fabricate and package the device,
in addition to the desired life expectancy.
V
Sn
I
Sn
(1)
(V
Ln
I
Ln
)
(2)
T
J
T
A
P
D
JA
(3)
T
J
T
A
P
D
JA(S)
(4)
JA(S)
JC
CA
JB
BA
JC
CA
JB
BA
(5)
40
60
80
100
120
140
0
100
200
Air Flow LFM
300
400
500
D, LowK
DW, LowK
D, HighK
DW, HighK
T
TB3R1, TB3R2
SLLS587B–NOVEMBER 2003–REVISED MAY 2004
Note that
θ
JA
is highly dependent on the PCB on
which the device is mounted, and on the airflow over
the
device
and
PCB.
standardized test conditions for measuring
θ
JA
. Two
commonly used conditions are the low-K and the
high-K
boards,
covered
EIA/JESD51-7 respectively. Figure 10 shows the
low-K and high-K values of
θ
JA
versus air flow for this
device and its package options.
The standardized
θ
JA
values may not accurately
represent the conditions under which the device is
used. This can be due to adjacent devices acting as
heat sources or heat sinks, to nonuniform airflow, or
to the system PCB having significantly different ther-
mal characteristics than the standardized test PCBs.
The second method of system thermal analysis is
more accurate. This calculation uses the power
dissipation and ambient temperature, along with two
device and two system-level parameters:
θ
JC
, the junction-to-case thermal resistance, in
degrees Celsius per watt
θ
JB
, the junction-to-board thermal resistance, in
degrees Celsius per watt
θ
CA
, the case-to-ambient thermal resistance, in
degrees Celsius per watt
θ
BA
, the board-to-ambient thermal resistance, in
degrees Celsius per watt.
JEDEC/EIA
has
defined
by
EIA/JESD51-3
and
There are two common approaches to estimating the
internal die junction temperature, T
J
. In both of these
methods, the device internal power dissipation P
D
needs to be calculated This is done by totaling the
supply power(s) to arrive at the system power
dissispation:
and then subtracting the total power dissipation of the
external load(s):
The first T
J
calculation uses the power dissipation
and ambient temperature, along with one parameter:
θ
JA
, the junction-to-ambient thermal resistance, in
degrees Celsius per watt.
The product of P
D
and
θ
JA
is the junction temperature
rise above the ambient temperature. Therefore:
In this analysis, there are two parallel paths, one
through the case (package) to the ambient, and
another through the device to the PCB to the ambi-
ent. The system-level junction-to-ambient thermal im-
pedance,
θ
JA(S)
, is the equivalent parallel impedance
of the two parallel paths:
where
The device parameters
θ
JC
and
θ
JB
account for the
internal structure of the device. The system-level
parameters
θ
CA
and
θ
BA
take into account details of
the PCB construction, adjacent electrical and mech-
anical components, and the environmental conditions
including airflow. Finite element (FE), finite difference
(FD), or computational fluid dynamics (CFD) pro-
grams can determine
θ
CA
and
θ
BA
. Details on using
these programs are beyond the scope of this data
sheet, but are available from the software manufac-
turers.
Figure 10. Thermal Impedance vs Air Flow
8
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