參數(shù)資料
型號: TB310
廠商: Intersil Corporation
英文描述: Decimating Digital Filter
中文描述: 元?dú)?,?shù)字濾波
文件頁數(shù): 14/19頁
文件大?。?/td> 190K
代理商: TB310
3-207
DECIMATE
Intersil provides a development system which assists the
design engineer to utilizing this filter. The DECIMATE
software package provides the user with both filter design
and simulation environments for filter evaluation and design.
These tools are integrated within one standard DSP CAD
environment, The Athena Group's Monarch Professional
DSP Software package.
The software package is designed specifically for the DDF. It
provides all the filter design software for this proprietary
architecture. It provides a user-friendly menu driven interface
to allow the user to input system level filter requirements. It
provides the frequency response curves and a data flow
simulation of the specified filter design (Figure 15). It also
creates all the information necessary to program the DDF,
including a PROM file for programming the control registers.
This software package runs on an IBM PC, XT, AT,
PS/2 computer or 100% compatible with the following
configuration:
640K RAM
5.25” or 3.5” Floppy drive
hard disk
math co-processor
MS/PC-DOS 2.0 or higher
CGA, MCGA, EGA, VGA and
Hercules graphics adapters
For more information, see the description of DECIMATE in
the Development Tools Section of this data book.
TABLE 1. DESIGN TRADE OFF FOR MINIMUM H
DEC
SPEEDGRADE
(MHz)
FIR_CK
CK_IN
MIN H
DEC
TAPS
F
DEC
= 1
F
DEC
= 2
F
DEC
= 4
F
DEC
= 8
F
DEC
= 16
33
1
9
8
24
56
120
248
25.6
1
7
4
16
40
88
184
15
1
4
(Note)
4
16
40
88
33
2
5
10
28
64
136
280
25.6
2
4
6
20
48
104
216
15
2
2
(Note)
4
16
40
88
33
4
3
14
36
80
168
344
25.6
4
2
6
20
48
104
216
15
4
1
(Note)
4
16
40
88
33
8
2
22
52
112
232
472
25.6
8
1
6
20
48
104
216
15
8
1
6
20
48
104
216
NOTE: Filter not realizable.
HSP43220
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