參數(shù)資料
型號: TB1254N
廠商: Toshiba Corporation
英文描述: PAL / NTSC / SECAM 1CHIP (IF+VCD PROCESSOR) IC
中文描述: PAL / NTSC制式/ SECAM制式1CHIP(中頻光碟處理器)芯片
文件頁數(shù): 51/58頁
文件大?。?/td> 551K
代理商: TB1254N
Ver3.7
00/01/28
51
Note
D28
Items/Symbols
Vertical NFB
Amplitude
/ V
NFB
Vertical Amplitude
Variable Range
/
V
VRAMPH
Bus conditoins
V
Size:0/32/63
Others:Preset
Measurement methods
(1)Measure the amplitude of NFB V Ramp at Pin25, that is
"V
NFB
". (2)Measure the amplitude of NFB V Ramp at Pin25 for V-
Size 0/63, that is
V
NFBMIN
/ V
NFBMAX
.
(3)Calculate; "
V
VRAMPH
"=(V
NFBMAX
-V
NFB
)/V
NFB
*100
"
V
VRAMPL
"=(V
NFBMIN
-V
NFB
)/V
NFB
*100
/
V
VRAMPL
Vertical
Variable Range
/
V
LIN1+
/
V
LIN1-
/
V
LIN2+
/
V
LIN2-
D29
Linearity
V Linearity:0/8/15
Others:Preset
(1)For V Linearity 8, measure V
1
(from center to max.) and
V
2
(from center to min.) at Pin24 according to a follownig figure.
(2)For V Linearity 15/0, measure V
LIN1+
/ V
LIN1-
and V
LIN2+
/ V
LIN2-
.
(3)Calculate; "
V
LIN1+
"=(V
LIN1+
-V
1
)/V1*100
"
V
LIN1-
"=(V
LIN1
--V
1
)/V
1
*100
"
V
LIN2+
"=(V
LIN2+
-V
2
)/V
2
*100
"
V
LIN2-
"=(V
LIN2
--V
2
)/V
2
*100
V1
V2
Pin24
signal
D30
Vertical S Correction
Variable Range
/
V
S1+
/
V
S1-
/
V
S2+
/
V
S2-
V S Corr.:0/8/15
Others:Preset
(1)For V S Correction:8, measure V
1
and V
2
at Pin24 according to
a figure of NOTE:D32 .
(2)For V S Correction:15/0, measure V
S1+
/ V
S1-
and V
S2+
/ V
S2-
.
(3)Calculate; "
V
S1+
"=(V
S1+
-V
1
)/V
1
*100
"
V
S1-
"=(V
S1
--V
1
)/V
1
*100
"
V
S2+
"=(V
S2+
-V
2
)/V
2
*100
"
V
S2-
"=(V
S2
--V
2
)/V
2
*100
Decreasing the Pin25 voltage from 5V, measure the voltage at
which Pin20 output drops to blanking level, that is "V
VG
".
D35
Vertical
Voltage
/ V
VG
Guard
All:Preset
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