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參數(shù)資料
| 型號(hào)： | TB1254N |
| 廠商： | Toshiba Corporation |
| 英文描述： | PAL / NTSC / SECAM 1CHIP (IF+VCD PROCESSOR) IC |
| 中文描述： | PAL / NTSC制式/ SECAM制式1CHIP（中頻光碟處理器）芯片 |
| 文件頁數(shù)： | 49/58頁 |
| 文件大?。?/td> | 551K |
| 代理商： | TB1254N |
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Ver3.7
00/01/28
49
Note
D12
Items/Symbols
Horizontal
Variable Range
/
PH
HPOS
Bus conditoins
H
Position:0/31
Others:Preset
Measurement methods
(1) nput a composite sync signal into Pin38.
(2) Changing BUS data of “Horizontal Position” from 0 to 31,
measure "
PH
HPOS
" according to the following figure.
Position
FBP in(Pin30)
(00)
(1F)
￠PH
HPOS
D13
AFC-2 Pulse
Threshold Level
/ V
AFC2
H-BLK Pulse
Threshold Level
/ V
HBLK
All:Preset
(1)Input a composite sync signal into Pin38.
(2)Decreasing the FBP high level, measure the DC level at which
H OUT phase changes against Sync Out phase, that is "V
AFC2
".
(1) nput a composite sync signal into Pin38.
(2) ncreasing the FBP high level, measure the DC level at which
H blanking begins to work, that is "V
HBLK
".
D14
All:Preset
D15
Black Peak Det. Stop
Period (H)
/ PH
BPDET
/ W
BPDET
TEST:00001000
Black Stretch:01
Others:Preset
(1) Input a composite sync signal into Pin38.
(2) According to the following figure, measure "PH
BPDET
" &
"W
BPDET
".
63.5ês
Sync in(Pin38)
H AFC(Pin29)
SCP OUT(Pin30)
4.7ês
￠PH
HPOS
W
BPDET
4.3V
0V
0.25V
D16
Gate Pulse Start
Phase
/ PH
GP
Gate Pulse Width
/ W
GP
All:Preset
(1) nput a composite sync signal into Pin38.
(2) According to the following figure, measure "PH
GP
" & "W
GP
".
63.5ês
Sync in(Pin38)
H AFC(Pin29)
SCP OUT(Pin30)
4.7ês
PH
GP
W
GP
4.3V
0V
0.25V
D17
Vertical Oscillation
Start Voltage
/ V
VON
All:Preset
(1) Let Pin1/14/37/42 be open.
(2) ncreasing Pin31 voltage, measure the voltage at which V
Ramp signal
(3) appears at Pin24, that is "V
VON
".
(1) nput a 50Hz composite sync signal into Pin38.
(2) Set V-Freq to 000.
(3) For no input, measure the frequecy of V Ramp at Pin22, that is
"F
VAUFR50
".
(3) Input a 60Hz composite sync signal into Pin38.
(4) Repeat (2)&(3), that is “F
VAUFR60
”
(5) Set V-Freq. To 001/101, repeat (2), that is "F
V50FR
" / "F
V60FR
".
(1) nput a 50Hz/60Hz composite sync signal into Pin38.
(2) Measure "T
50GPM
" / "T
60GPM
" at Pin30. (cf. Fig.D21)
D18
Vertical Free-run
Frequency
/ F
VAUFR50
/ F
VAUFR60
/ F
V50FR
/ F
V60FR
V-Freq:
000/001/010
Others:Preset
D19
Gate Pulse V-
Masking Period
/ T
50GPM
/ T
60GPM
All:Preset
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