參數(shù)資料
型號(hào)： TAS5613ADKDR
廠商： Texas Instruments
文件頁(yè)數(shù)： 11/33頁(yè)
文件大?。?/td> 0K
描述： IC AMP AUD 150W STER D 44HSSOP
標(biāo)準(zhǔn)包裝： 1
系列： PurePath™ HD
類型： D 類
輸出類型： 1-通道（單聲道）或 2-通道（立體聲）
在某負(fù)載時(shí)最大輸出功率 x 通道數(shù)量： 300W x 1 @ 2 歐姆; 200W x 2 @ 3 歐姆
電源電壓： 18 V ~ 38 V
特點(diǎn)： 消除爆音，差分輸入，短路和熱保護(hù)，關(guān)閉
安裝類型： 表面貼裝
供應(yīng)商設(shè)備封裝： 44-HSSOP
封裝/外殼： 44-BSSOP（0.433"，11.00mm 寬）裸露焊盤(pán)
包裝： 標(biāo)準(zhǔn)包裝
其它名稱： 296-29706-6
SLAS711B
– JUNE 2010 – REVISED SEPTEMBER 2011
ERROR REPORTING
The SD, OTW, OTW1 and OTW2 pins are active-low, open-drain outputs. The function is for protection-mode
signaling to a PWM controller or other system-control device.
Any fault resulting in device shutdown is signaled by the SD pin going low. Also, OTW and OTW2 go low when
the device junction temperature exceeds 125
°C, and OTW1 goes low when the junction temperature exceeds
100
Table 2. Error Reporting
SD
OTW1
OTW2, OTW
DESCRIPTION
0
Overtemperature (OTE) or overload (OLP) or undervoltage (UVP) Junction temperature higher than 125
°C
(overtemperature warning)
0
1
Overload (OLP) or undervoltage (UVP). Junction temperature higher than 100
°C (overtemperature
warning)
0
1
Overload (OLP) or undervoltage (UVP). Junction temperature lower than 100
°C
1
0
Junction temperature higher than 125
°C (overtemperature warning)
1
0
1
Junction temperature higher than 100
°C (overtemperature warning)
1
Junction temperature lower than 100
°C and no OLP or UVP faults (normal operation)
Note that asserting either RESET low forces the SD signal high, independent of faults being present. TI
recommends monitoring the OTW signal using the system microcontroller and responding to an overtemperature
warning signal by, e.g., turning down the volume to prevent further heating of the device resulting in device
shutdown (OTE).
To reduce external component count, an internal pullup resistor to 3.3V is provided on both SD and OTW
outputs. Level compliance for 5V logic can be obtained by adding external pullup resistors to 5 V (see the
Electrical Characteristics section of this data sheet for further specifications).
DEVICE PROTECTION SYSTEM
The TAS5613A contains advanced protection circuitry carefully designed to facilitate system integration and ease
of use, as well as to safeguard the device from permanent failure due to a wide range of fault conditions such as
short circuits, overload, overtemperature, and undervoltage. The TAS5613A responds to a fault by immediately
setting the power stage in a high-impedance (Hi-Z) state and asserting the SD pin low. In situations other than
overload and overtemperature error (OTE), the device automatically recovers when the fault condition has been
removed, i.e., the supply voltage has increased.
The device will function on errors, as shown in Table 3.
Table 3. Device Protection
BTL
MODE
PBTL
MODE
SE
MODE
LOCAL
TURNS OFF
ERROR IN
A
A+B
B
A+B+C+D
C
C+D
D
Bootstrap UVP does not shutdown according to the table, it shuts down the respective halfbridge (non-latching,
does not assert SD).
PIN-TO-PIN SHORT CIRCUIT PROTECTION (PPSC)
The PPSC detection system protects the device from permanent damage in the case that a power output pin
(OUT_X) is shorted to GND_X or PVDD_X. For comparison, the OC protection system detects an overcurrent
after the demodulation filter where PPSC detects shorts directly at the pin before the filter. PPSC detection is
performed at startup i.e. when VDD is supplied, consequently a short to either GND_X or PVDD_X after system
startup will not activate the PPSC detection system. When PPSC detection is activated by a short on the output,
all half bridges are kept in a Hi-Z state until the short is removed, the device then continues the startup sequence
Copyright
2010–2011, Texas Instruments Incorporated
19
Product Folder Link(s): TAS5613A
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