參數(shù)資料
型號(hào): TAS5146DKD
廠商: Texas Instruments, Inc.
英文描述: STEREO DIGITAL AMPLIFIER POWER STAGE
中文描述: 立體聲數(shù)字放大器功率級(jí)
文件頁數(shù): 3/26頁
文件大小: 583K
代理商: TAS5146DKD
www.ti.com
MODE Selection Pins for Both Packages
Package Heat Dissipation Ratings
(1)
TAS5142
SLES126B–DECEMBER 2004–REVISED MAY 2005
GENERAL INFORMATION (continued)
MODE PINS
M2
0
0
1
1
PWM INPUT
OUTPUT CONFIGURATION
PROTECTION SCHEME
M3
0
0
0
0
M1
0
1
0
1
2N
(1)
AD/BD modulation
Reserved
1N
(1)
AD modulation
1N
(1)
AD modulation
2 channels BTL output
BTL mode
(2)
2 channels BTL output
1 channel PBTL output
BTL mode
(2)
PBTL mode. Only PWM_A input is used.
Protection works similarly to BTL mode
(2)
. Only
difference in SE mode is that OUT_X is Hi-Z
instead of a pulldown through internal pulldown
resistor.
1
0
0
1N
(1)
AD modulation
4 channels SE output
1
1
1
0
1
1
1
0
1
Reserved
(1)
The 1N and 2N naming convention is used to indicate the required number of PWM lines to the power stage per channel in a specific
mode.
An overload protection (OLP) occurring on A or B causes both channels to shut down. An OLP on C or D works similarly. Global errors
like overtemperature error (OTE), undervoltage protection (UVP), and power-on reset (POR) affect all channels.
(2)
PARAMETER
TAS5142DKD
1.28
2.56
8.6
80 mm
2
TAS5142DDV
1.28
2.56
8.6
36 mm
2
R
θ
JC
(°C/W)—2 BTL or 4 SE channels (8 transistors)
R
θ
JC
(°C/W)—1 BTL or 2 SE channel(s) (4 transistors)
R
θ
JC
(°C/W)—(1 transistor)
Pad area
(2)
(1)
(2)
JC is junction-to-case, CH is case-to-heatsink.
R
θ
CH
is an important consideration. Assume a 2-mil thickness of typical thermal grease between the pad area and the heatsink. The
R
θ
CH
with this condition is 0.8°C/W for the DKD package and 1.8°C/W for the DDV package.
3
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