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參數(shù)資料
| 型號： | TAS5146DKD |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | STEREO DIGITAL AMPLIFIER POWER STAGE |
| 中文描述： | 立體聲數(shù)字放大器功率級 |
| 文件頁數(shù)： | 22/26頁 |
| 文件大?。?/td> | 583K |
| 代理商： | TAS5146DKD |
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Undervoltage Protection (UVP) and Power-On
Reset (POR)
DEVICE RESET
Two reset pins are provided for independent control
of half-bridges A/B and C/D. When RESET_AB is
asserted low, all four power-stage FETs in half-
-
bridges A and B are forced into a high-impedance
(Hi-Z) state. Likewise, asserting RESET_CD low
forces all four power-stage FETs in half-bridges C
and D into a high-impedance state. Thus, both reset
pins are well suited for hard-muting the power stage if
needed.
Overtemperature Protection
TAS5142
SLES126B–DECEMBER 2004–REVISED MAY 2005
For the lowest-cost bill of materials in terms of
component selection, the OC threshold measure
should be limited, considering the power output
requirement
and
minimum
Higher-impedance loads require a lower OC
threshold.
The demodulation-filter inductor must retain at
least 5
μ
H of inductance at twice the OC
threshold setting.
(OTW) when the device junction temperature ex-
ceeds 125
°
C (nominal) and, if the device junction
temperature exceeds 155
°
C (nominal), the device is
put into thermal shutdown, resulting in all half-bridge
outputs being set in the high-impedance (Hi-Z) state
and SD being asserted low. OTE is latched in this
case. To clear the OTE latch, both RESET_AB and
RESET_CD must be asserted. Thereafter, the device
resumes normal operation.
load
impedance.
Unfortunately, most inductors have decreasing in-
ductance with increasing temperature and increasing
current (saturation). To some degree, an increase in
temperature naturally occurs when operating at high
output currents, due to core losses and the dc
resistance
of
the
inductor's
thorough analysis of inductor saturation and thermal
properties is strongly recommended.
The UVP and POR circuits of the TAS5142 fully
protect
the
device
in
any
brownout situation. While powering up, the POR
circuit resets the overload circuit (OLP) and ensures
that all circuits are
fully
GVDD_X and VDD supply voltages reach 9.8 V
(typical). Although GVDD_X and VDD are indepen-
dently monitored, a supply voltage drop below the
UVP threshold on any VDD or GVDD_X pin results in
all half-bridge outputs immediately being set in the
high-impedance (Hi-Z) state and SD being asserted
low. The device automatically resumes operation
when all supply voltages have increased above the
UVP threshold.
power-up/down
and
copper
winding.
A
operational
when
the
Setting the OC threshold too low might cause issues
such as lack of enough output power and/or unexpec-
ted shutdowns due to too-sensitive overload detec-
tion.
In general, it is recommended to follow closely the
external component selection and PCB layout as
given in the
Application
section.
For
programmable within a limited range using a single
external resistor connected between the OC_ADJ pin
and AGND. (See the
Electrical Characteristics
section
of this data sheet for information on the correlation
between programming-resistor value and the OC
threshold.) It should be noted that a properly func-
tioning overcurrent detector assumes the presence of
a
properly
designed
demodulation
power-stage output. Short-circuit protection is not
provided directly at the output pins of the power stage
but only on the speaker terminals (after the demodu-
lation filter). It is required to follow certain guidelines
when selecting the OC threshold and an appropriate
demodulation inductor:
added
flexibility,
the
OC
threshold
is
filter
at
the
In BTL modes, to accommodate bootstrap charging
prior to switching start, asserting the reset inputs low
enables weak pulldown of the half-bridge outputs. In
the SE mode, the weak pulldowns are not enabled,
and it is therefore recommended to ensure bootstrap
capacitor charging by providing a low pulse on the
PWM inputs when reset is asserted high.
OC-Adjust Resistor Values
(k
)
22
27
39
47
69
Max. Current Before OC Occurs
(A)
9.4
8.6
6.4
6
4.7
Asserting either reset input low removes any fault
information to be signalled on the SD output, i.e., SD
is forced high.
A rising-edge transition on either reset input allows
the device to resume operation after an overload
fault.
The TAS5142 has a two-level temperature-protection
system that asserts an active-low warning signal
22
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TAS5152 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:STEREO DIGITAL AMPLIFIER POWER STAGE |
| TAS5152_07 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:STEREO DIGITAL AMPLIFIER POWER STAGE |
| TAS5152DKD | 功能描述:音頻放大器 Stereo 125W Powerstage RoHS:否 制造商:STMicroelectronics 產(chǎn)品:General Purpose Audio Amplifiers 輸出類型:Digital 輸出功率: THD + 噪聲: 工作電源電壓:3.3 V 電源電流: 最大功率耗散: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFP-64 封裝:Reel |
| TAS5152DKD | 制造商:Texas Instruments 功能描述:Special Function IC |
| TAS5152DKDG4 | 功能描述:音頻放大器 Stereo 125W Powerstage RoHS:否 制造商:STMicroelectronics 產(chǎn)品:General Purpose Audio Amplifiers 輸出類型:Digital 輸出功率: THD + 噪聲: 工作電源電壓:3.3 V 電源電流: 最大功率耗散: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFP-64 封裝:Reel |
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