
2007-2011 Microchip Technology Inc.
DS70265E-page 97
dsPIC33FJ12MC201/202
REGISTER 7-20:
IPC14: INTERRUPT PRIORITY CONTROL REGISTER 14
U-0
R/W-1
R/W-0
—
—QEIIP<2:0>
bit 15
bit 8
U-0
R/W-1
R/W-0
U-0
—
PWM1IP<2:0>
—
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-12
Unimplemented:
Read as ‘0’
bit 10-8
QEIIP<2:0>:
QEI Interrupt Priority bits
111
= Interrupt is priority 7 (highest priority interrupt)
001
= Interrupt is priority 1
000
= Interrupt source is disabled
bit 7
Unimplemented:
Read as ‘0’
bit 6-4
PWM1IP<2:0>:
PWM1 Interrupt Priority bits
111
= Interrupt is priority 7 (highest priority interrupt)
001
= Interrupt is priority 1
000
= Interrupt source is disabled
bit 3-0
Unimplemented:
Read as ‘0’