參數(shù)資料
型號: T8536
廠商: Lineage Power
元件分類: Codec
英文描述: Quad Programmable Codec(四通道可編程編解碼器)
中文描述: 四可編程編解碼器(四通道可編程編解碼器)
文件頁數(shù): 26/54頁
文件大小: 1872K
代理商: T8536
26
Lucent Technologies Inc.
Preliminary Data Sheet
July 2000
T8535/T8536 Quad Programmable Codec
Functional Description
(continued)
The Control Interface
(continued)
Fast Scan Mode
(continued)
0124
* Provide sufficient wait time to access read data. Provide sufficient DCLK cycles to effectively wait
1.5
μ
s after the second full DCLK cycle
and before the second to last full DCLK cycle. DCLK operation of 4.096 MHz would require 10 cycles of DCLK between COMMAND and
DATA. The first two DCLK cycles, when CS goes high, processes the command. A wait is then required to access the read data. Two final
DCLK cycles are required to process the read data.
Two or more DCLK cycles are required before the start of a new command frame.
Figure 18. Fast Scan, Byte-by-Byte Mode (Continuous DCLK)
0126
Note: CK1 through CK8 are additional DCLK pulses required to properly process the data.
Figure 19. Fast Scan, Byte-by-Byte Mode (Gapped DCLK)
1
2
3
CS
DCLK
DI
COMMAND
DATA
4
5
DO
WAIT
1.5
μ
s
0
1
2
3
4
5
6
7
6
7
0
1
2
3
4
5
6
7
0
*
1
2
3
CS
DCLK
DI
COMMAND
DATA
4
5
DO
WAIT
1.5
μ
s
0
1
2
3
4
5
6
7
6
7
0
1
2
3
4
5
6
7
0
C
C
C
C
C
C
C
C
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