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參數(shù)資料
| 型號： | T71L6816A |
| 廠商： | TM Technology, Inc. |
| 英文描述： | Sixteen-port 10/100 Switch |
| 中文描述： | 16端口10/100交換機 |
| 文件頁數(shù)： | 5/22頁 |
| 文件大?。?/td> | 820K |
| 代理商： | T71L6816A |
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3. Functional Description
Preliminary T71L6816A
Taiwan Memory Technology, Copy-Right reserved.
P. 5
Change to products or specifications without notice.
Publication Date:Jun. 2001
Revision:0.A
3.1 Reset
The T71L6816A will determine some function features chosen by the content of 24LC02
serial EEPROM which was loaded after power on reset. Also, the T71L6816A will write
the abilities derived from 24LC02 or internal default value if 24LC02 is not present
to connected PHY management registers via MDC/MDIO.
3.2 RMII Interface
The T71L6816A provides the low pin count RMII (Reduced Media Independent Interface)
interface capable of supporting 10/100 Mbps data rates between PHY and T71L6816A.
A single clock, 50MHz, sourced from an external clock input is needed for receive(RX)
and transmit(TX) to provide an independent 2-bit wide (di-bit) transmit and receive
data paths. In the case of the REFCLK is 10 times the data rate, namely, 100Mbps mode,
each data di-bit must be output on TXD[1:0] and input on RXD[1:0] for ten successive
REFCLK cycles.
RMII specification signals are listed below:
Signal Name
Direction
(with respect to
PHY)
Input
Direction
(with respect to
T71L6816A)
Input
Use
REFCLK
Synchronous clock reference for Rx,
Tx and control interface
Carrier sense / receive data valid
Receive data
Transmit enable
Transmit data
CRSDV
RXD[1:0]
TXEN
TXD[1:0]
Output
Output
Input
Input
Input
Input
Output
Output
3.3 Data Reception
The port will enter the receive-state when the CRSDV signal in the RMII interface is
asserted and then the RMII presents the received data in two-bit(di-bit) format that are
synchronous to the RMII reference clock, namely, REFCLK. The T71L6816A will then try
to identify the occurrence of the SFD(Start Frame Delimiter) pattern “10101011”. Once
the SFD was identified, all preamble data prior to SFD will be discarded and the frame
data will be forwarded and stored in the buffer of the switch.
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