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參數(shù)資料
| 型號(hào)： | T35L6432B |
| 廠商： | TM Technology, Inc. |
| 英文描述： | 64K x 32 SRAM |
| 中文描述： | 64K的× 32的SRAM |
| 文件頁(yè)數(shù)： | 10/16頁(yè) |
| 文件大?。?/td> | 162K |
| 代理商： | T35L6432B |
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TE
CH
tm
CAPACITANCE
DESCRIPTION
Input Capacitance
Input/ Output
Capacitance(DQ)
THERMAL CONSIDERATION
DESCRIPTION
Thermal Resistance - Junction to
Ambient
Thermal Resistance - Junction to Case
AC TEST CONDITIONS
T35L6432B
Taiwan Memory Technology, Inc. reserves the right
P.10
to change products or specifications without notice.
Publication Date: JUL. 2002
Revision: A
CONDITIONS
SYM.
CI
TYP
3
MAX
4
UNITS NOTES
pF
4
TA = 25
°
C; f = 1 MHz
VCC = 3.3V
CO
6
7
pF
4
CONDITIONS
Still air, soldered on
4.25x1.125 inch 4-layer
PCB
SYM. QFP TYP UNITS NOTES
Θ
JA
20
°
C/W
Θ
JB
1
°
C/W
Input pulse levels
Input rise and fall times
Input timing reference levels
Output reference levels
Output load
0V to 3.0V
1.5ns
1.5V
1.5V
See Figures 1 and
2
Notes:
1. All voltages referenced to VSS (GND).
2. Overshoot:
VIH
≤
+3.6 V for t
≤
tKC/2.
Undershoot: VIL
≤
-1.0 V for t
≤
tKC/2.
3. Icc is given with no output current. Icc increases with
greater output loading and faster cycle times.
4. This parameter is sampled.
5. Test conditions as specified with the output loading
as shown in Fig. 1 unless otherwise noted.
6. Output loading is specified with CL = 5 pF as in Fig.
2.
7. At any given temperature and voltage condition,
tKQHZ is less than tKQLZ and tOEHZ is less than
tOELZ.
8. A READ cycle is defined by byte write enables all
HIGH or
ADSP
LOW along with chip enables
being active for the required setup and hold times. A
WRITE cycle is defined by at one byte or all byte
WRITE per READ/WRITE TRUTH TABLE.
9.
OE
is a "don't care" when a byte write enable is
sampled LOW.
10.This is a synchronous device. All synchronous inputs
must meet specified setup and hold time, except for
"don't care" as defined in the truth table.
11.AC I/O curves are available upon request.
12."Device Deselected means the device is in
POWER-DOWN mode as defined in the truth table.
"Device Selected" means the device is active.
13.Typical values are measured at 3.3V, 25
°
C and 20ns
cycle time.
14.MODE pin has an internal pull-up and exhibits an
input leakage current of
±
10
μ
A.
OUTPUT LOADS
D Q
3.3V
317
ohm
351
ohm
5 pF
Z
0
= 50 ohm
50
ohm
V t = 1.5V
D Q
Fig. 1 output load equivalent
Fig. 2 output load equivalent
(for tK Q H Z,tK Q LZ,tO EH Z,tO ELZ)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| T35L6432B-10Q | 64K x 32 SRAM |
| T35L6432B-12T | 64K x 32 SRAM |
| T35L6464A | 64K x 64 SRAM |
| T35L6464A-5L | 64K x 64 SRAM |
| T35L6464A-5Q | 64K x 64 SRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| T35L6432B-10Q | 制造商:TMT 制造商全稱:TMT 功能描述:64K x 32 SRAM |
| T35L6432B-12T | 制造商:TMT 制造商全稱:TMT 功能描述:64K x 32 SRAM |
| T35L6464A | 制造商:TMT 制造商全稱:TMT 功能描述:64K x 64 SRAM |
| T35L6464A-5L | 制造商:TMT 制造商全稱:TMT 功能描述:64K x 64 SRAM |
| T35L6464A-5Q | 制造商:TMT 制造商全稱:TMT 功能描述:64K x 64 SRAM |
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