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參數(shù)資料
| 型號： | T35L6432B-10Q |
| 廠商： | TM Technology, Inc. |
| 英文描述： | 64K x 32 SRAM |
| 中文描述： | 64K的× 32的SRAM |
| 文件頁數(shù)： | 8/16頁 |
| 文件大?。?/td> | 162K |
| 代理商： | T35L6432B-10Q |
TE
CH
tm
ABSOLUTE MAXIMUM RATINGS*
Voltage on VCC Supply Relative to VSS.
…………-0.5V to +4.6V
I/O Supply Voltage VccQ ........... Vss -0.5V to
Vcc
VIN......................................... -0.5V to Vcc +0.5V
Storage Temperature (plastic)...... -55
°
C to +150
°
C
Junction Temperature ..........….................. +150
°
C
Power Dissipation ........................................ 1.0W
Short Circuit Output Current...................... 100mA
DC ELECTRICAL CHARACTERISTICS AND RECOMMENDED
OPERATING CONDITIONS
(0
°
C
≤
Ta
≤
70
°
C; VCC = 3.3V (+0.3V/-0.165V) unless otherwise noted)
DESCRIPTION
CONDITIONS
Input High (Logic)
voltage
Input Low (Logic)
voltage
Input Leakage Current
0V
≤
VIN
≤
VCC
Output Leakage Current
Output(s) disabled, 0V
≤
VOUT
≤
VCC
Output High Voltage
IOH = -4.0 mA
Output Low Voltage
IOL = 8.0 mA
Supply Voltage
T35L6432B
Taiwan Memory Technology, Inc. reserves the right
P.8
to change products or specifications without notice.
Publication Date: JUL. 2002
Revision: A
*Stresses greater than those listed under
"Absolute
Maximum
Ratings"
permanent damage to the device. This is a stress
rating only and functional operation of the device
at these or any other conditions above those
indicated in the operational sections of this
specification is not implied. Exposure to
absolute maximum rating conditions for extended
periods may affect reliability.
may
cause
SYM.
VIH
MIN
2
MAX
UNITS
V
NOTES
1, 2
VCCQ + 0.3
VIL
-0.3
0.8
V
1, 2
ILI
ILO
-2
-2
2
2
uA
uA
14
VOH
VOL
Vcc
2.4
3.1
V
V
V
1, 11
1, 11
1
0.4
3.6
MAX.
DESCRIPTION
CONDITIONS
SYM. TYP
-9
-10 -11 -12 UNITS NOTES
Power Supply
Current : Operating
Device selected; all inputs
≤
VIL or
≥
VIH; cycle time
≥
tKC MIN; VCC
= MAX; outputs open
ICC
TBD 250 200 150 120
mA
3, 12, 13
Power Supply
Current: Idle
Device selected;
ADSC
,
ADSP
,
ADV
,
GW
,
BWE
≥
VIH; all other
inputs
≤
VIL or
≥
VIH; VCC = MAX;
cycle time
≥
tKC MIN: outputs open
Device deselected; VCC = MAX; all
inputs
≤
VSS + 0.2 or
≥
VCC - 0.2;
all inputs static; CLK frequency =0
ISB1 TBD
60
60
60
60
mA
12, 13
CMOS Standby
ISB2 TBD
10
10
10
10
mA
12, 13
TTL Standby
Device deselected; all inputs
≤
VIL
or
≥
VIH; all inputs static; VCC =
MAX;CLK frequency = 0
Device deselected; all inputs
≤
VIL
or
≥
VIH; VCC =MAX; CLK cycle
time
≥
tKCMIN
ISB3 TBD
25
25
25
25
mA
12, 13
Clock Running
ISB4 TBD
60
60
60
60
mA
12, 13
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