參數(shù)資料
型號: SY89464UMYTR
廠商: MICREL INC
元件分類: 時鐘及定時
英文描述: 89464 SERIES, LOW SKEW CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), QCC44
封裝: 7 X 7 MM, LEAD FREE, MO-220, MLF-44
文件頁數(shù): 3/19頁
文件大?。?/td> 689K
代理商: SY89464UMYTR
Micrel, Inc.
SY89464U
December 2007
M9999-120607-B
hbwhelp@micrel.com or (408) 955-1690
11
Case #4: Input Clock Failure: Switching from the
selected clock input stuck in an undetermined state to
a valid clock input (RPE-enabled).
If CLK1 fails to an undetermined state (e.g., amplitude
falls below the 100mV (VIN) minimum single-ended
input limit, or 200mV differentially) before the RPE
MUX selects CLK2 (using the SEL pin), the switchover
to the valid clock CLK2 will occur either following Case
#2 or Case #3, depending upon the last valid state at
the CLK1.
If the selected input clock fails to a floating, static, or
extremely low signal swing, including 0mV, the FSI
function will eliminate any metastable condition and
guarantee a stable output signal. No ringing and no
undetermined state will occur at the output under
these conditions.
Please note that the FSI function will not prevent duty
cycle distortions or runt pulses in case of a slowly
deteriorating (but still toggling) input signal. Due to the
FSI function, the propagation delay will depend upon
rise and fall time of the input signal and on its
amplitude. Refer to “Typical Operating Characteristics”
for detailed information.
Timing Diagram 4
相關(guān)PDF資料
PDF描述
SY89464UMY 89464 SERIES, LOW SKEW CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), QCC44
SY89467UHYTR 89467 SERIES, LOW SKEW CLOCK DRIVER, 20 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP64
SY89467UHY 89467 SERIES, LOW SKEW CLOCK DRIVER, 20 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP64
SY89482LMG LOW SKEW CLOCK DRIVER, QCC24
SY89482LMGTR LOW SKEW CLOCK DRIVER, QCC24
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