參數(shù)資料
型號: SX8723E083TRT
元件分類: ADC
英文描述: 5-CH 16-BIT PROPRIETARY METHOD ADC, SERIAL ACCESS, PDSO12
封裝: 4 X 4 MM, ROHS COMPLIANT, MLPD-12
文件頁數(shù): 52/53頁
文件大小: 3978K
代理商: SX8723E083TRT
ADVANCED COMMUNICATIONS & SENSING
V1.8 2009 Semtech Corp.
www.semtech.com
8
SX8723
ZoomingADC for Pressure and Temperature Sensing
Timing Characteristics
Parameter
Symbol
Comments / Conditions
Min
Typ
Max
Unit
Interrupt (Ready) timing specification
READY pulse width (2)
tIRQ
1
1/FS
2-WIRE timing specifications(1)
SCL clock frequency
fSCL
0
400
kHz
SCL low period
tLOW
1.3
s
SCL high period
tHIGH
0.6
s
Data setup time
tSU;DAT
100
ns
Data hold time
tHD;DAT
0
ns
Repeated start setup time
tSU;STA
0.6
s
Start condition hold time
tHD;STA
0.6
s
Stop condition hold time
tSU;STO
0.6
s
Bus free time between stop and start
tBUF
1.3
s
Input glitch suppression
tSP
50
ns
Notes:
(1) All timing specifications are referred to VILmin and VIHmax voltage levels defined for the SCL and SDA pins.
(2) The READY pulse indicates End of Conversion. This is a Low going pulse of duration equal to one cycle of the ADC sampling rate.
2-WIRE Timing Waveforms
Figure 1 - 2-WIRE Start and Stop timings
Figure 2 - 2-WIRE Data timings
SDA
SCL
t
SU;STA
t
HD;STA
t
SU;STO
t
BUF
SDA
SCL
t
LOW
t
HIGH
t
HD;DAT
t
SU;DAT
t
SP
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